[Bug target/65167] ICE: in assign_by_spills, at lra-assigns.c:1383 (unable to find a register to spill) with -O -fschedule-insns -fcheck-pointer-bounds -mmpx
enkovich.gnu at gmail dot com
gcc-bugzilla@gcc.gnu.org
Tue Feb 24 09:36:00 GMT 2015
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65167
--- Comment #1 from Ilya Enkovich <enkovich.gnu at gmail dot com> ---
For call arguments we usually store bounds passed in bounds tables and then
fill bounds passed in registers. But with -fschedule-insns we have order
changed and all hard registers are filled with values before BNDSTX. This is
not a nice schedule because it requires additional spills. Seems LRA fails to
spill a register when all of them are used to pass args. This situation didn't
happen before because bounds registers is the first case when we use all
registers to pass args. Should LRA be able to spill/fill initialized hard reg?
Can it be fixed or we better avoid such scheduling?
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