[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[wschmidt at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

--- Comment #5 from Bill Schmidt <wschmidt at gcc dot gnu.org> ---
Author: wschmidt
Date: Fri Apr  4 15:14:01 2014
New Revision: 209116

URL: http://gcc.gnu.org/viewcvs?rev=209116&root=gcc&view=rev
Log:
[gcc]

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

    Back port mainline subversion id 209025.
    2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
    software floating point or no floating point registers, do not
    allow any type in the FPRs.  Eliminate a test for SPE SIMD types
    in GPRs that occurs after we tested for GPRs that would never be
    true.

    * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
    Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
    since the FMOVE64 type is DFmode/DDmode.  If TARGET_E500_DOUBLE,
    specifically allow DDmode, since that does not use the SPE SIMD
    instructions.


Modified:
    branches/gcc-4_8-branch/gcc/ChangeLog
    branches/gcc-4_8-branch/gcc/config/rs6000/rs6000.c
    branches/gcc-4_8-branch/gcc/config/rs6000/rs6000.md