[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type
meissner at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Wed Apr 2 17:17:00 GMT 2014
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735
--- Comment #4 from Michael Meissner <meissner at gcc dot gnu.org> ---
Author: meissner
Date: Wed Apr 2 17:16:33 2014
New Revision: 209026
URL: http://gcc.gnu.org/viewcvs?rev=209026&root=gcc&view=rev
Log:
2014-04-02 Michael Meissner <meissner@linux.vnet.ibm.com>
Back port mainline subversion id 209025.
2014-04-02 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60735
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
software floating point or no floating point registers, do not
allow any type in the FPRs. Eliminate a test for SPE SIMD types
in GPRs that occurs after we tested for GPRs that would never be
true.
* config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
since the FMOVE64 type is DFmode/DDmode. If TARGET_E500_DOUBLE,
specifically allow DDmode, since that does not use the SPE SIMD
instructions.
Modified:
branches/ibm/gcc-4_8-branch/gcc/ChangeLog.ibm
branches/ibm/gcc-4_8-branch/gcc/config/rs6000/rs6000.c
branches/ibm/gcc-4_8-branch/gcc/config/rs6000/rs6000.md
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