[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

[ubizjak at gmail dot com]

------- Comment #15 from ubizjak at gmail dot com  2007-11-23 07:43 -------
(In reply to comment #13)

> I think the bug can be closed as fixed now.

The problem of redundant stores has been fixed, but the code is far from
optimal. As evident from PR 17236, icc generates:

        movl      8(%esp), %ecx                                 #516.18
        imull     12(%esp), %ecx                                #516.18
        movl      16(%esp), %eax                                #516.18
        imull     4(%esp), %eax                                 #516.18
        addl      %eax, %ecx                                    #516.18
        movl      4(%esp), %eax                                 #516.18
        mull      12(%esp)                                      #516.18
        addl      %ecx, %edx                                    #516.18
        ret                                                     #516.18


-- 

ubizjak at gmail dot com changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
OtherBugsDependingO|                            |17236
              nThis|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=6585