[Bug optimization/11259] New: [avr] gcc Double 'andi' missed optimization

[chris at westnet dot com]

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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=11259

           Summary: [avr] gcc Double 'andi' missed optimization
           Product: gcc
           Version: 3.3
            Status: UNCONFIRMED
          Severity: normal
          Priority: P2
         Component: optimization
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: chris@westnet.com
                CC: gcc-bugs@gcc.gnu.org

I've found what looks like a missed optimization in avr-gcc  3.3 20030512

        uint8_t Encoder;

        Encoder = (PORTD >> 4) & 12;
   0:   82 b3           in      r24, 0x12       ; 18
   2:   82 95           swap    r24
   4:   8f 70           andi    r24, 0x0F       ; 15
   6:   8c 70           andi    r24, 0x0C       ; 12

The 4 bit shift is implemented as a swap/andi , but with an explicit andi
afterwards, it seems like an obvious optimization to combine them.

Trivial example code below, compiled with:
avr-gcc -c e.c -g -O2 -mmcu=at90s8535 -o e.o
#include <avr/io.h>
#include <inttypes.h>


int8_t  test ()
{

        uint8_t Encoder;

        Encoder = (PORTD >> 4) & 12;
        return(Encoder);

}