combine vs. ext_dce (was Re: [RFC] bpf: don't synthesize sign_extend for ISA v4)

[Jeffrey Law]

On 4/15/2026 11:32 AM, Vineet Gupta wrote:
> +CC gcc-patches which  I missed in the orig posting
>
> On 4/13/26 11:58 AM, Vineet Gupta wrote:
>> Currently the bpf extendsidi2 expander generates a shift left+right to
>> materialize a sign_extend. This is not needed for ISA v4 which
>> natively supports the sign extending move.
>>
>> There are various other reasons for fixing this:
>>
>>   - The shifts are throwaway work since Combine subsequently undoes them
>>     anyways, while diminishing potential opportunities for other optim
>>     transformations it could have done, given to its own limitations of
>>     max 3 -> 2 combinations.
>
> While this might be a valid statement in general, it seems to be 
> incorrect for some of the sefltest failures reported below.
> Combine has super powers :-)
>
> Consider the following test, extracted  from #413 sockopt_multi
>
>    struct bpf_sockopt {
>        int level, optname, optlen, retval;
>        void *optval_end, *optval;
>    };
>
>    typedef unsigned char u8;
>
>    int getsockopt_child(struct bpf_sockopt *ctx)
>    {
>      u8 *optval_end = ctx->optval_end;
>      u8 *optval = ctx->optval;
>
>       if (ctx->optname != 1)
>         goto out;
>
>      if (ctx->level != 0 || ctx->optname != 1)
>       goto out;
>
>      if (optval[0] != 0x80)
>       return 0;
>
>      ctx->retval = 0;
>      return 1;
>
>    out:
>      return 1;
>    }
>
>
> -O2 -mcpu=v4
>
> W/o this patch, BPF extendsidi2 expander synthesizes the 2 shifts, 
> along with the initial mem access
>
>    (insn 8 3 9 2 (set (reg:SI 25 [ ctx_7(D)->optname ])
>             (mem:SI (plus:DI (reg/v/f:DI 24 [ ctx ])
>                     (const_int 4 [0x4])) [3 ctx_7(D)->optname+0 S4
>    A32]))  {*movsi}
>          (nil))
>    (insn 9 8 10 2 (set (reg:DI 19 [ _1 ])
>             (ashift:DI (subreg:DI (reg:SI 25 [ ctx_7(D)->optname ]) 0)
>                 (const_int 32 [0x20])))  {ashldi3}
>          (expr_list:REG_DEAD (reg:SI 25 [ ctx_7(D)->optname ])
>             (nil)))
>    (insn 10 9 11 2 (set (reg:DI 32 [ _1 ])
>             (ashiftrt:DI (reg:DI 19 [ _1 ])
>                 (const_int 32 [0x20])))  {ashrdi3}
>          (expr_list:REG_DEAD (reg:DI 19 [ _1 ])
>             (nil)))
>
>
> ext_dce can't figure out the 2 shifts (although it seems it was given 
> the specific capabilites [1]
I didn't look deeply, but it is recognizing the shift pair but relevant 
bits are still live.  It may be the subreg use when setting the return 
value, but again, I didn't actually look at the liveness bitmaps to be sure.

Jeff