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RE: Changing the MIPS ISA for the Loongson 3A from MIPS64 to MIPS64r2
- From: Andrew Bennett <Andrew dot Bennett at imgtec dot com>
- To: Richard Sandiford <rdsandiford at googlemail dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Wed, 5 Mar 2014 09:32:53 +0000
- Subject: RE: Changing the MIPS ISA for the Loongson 3A from MIPS64 to MIPS64r2
- Authentication-results: sourceware.org; auth=none
- References: <0DA23CC379F5F945ACB41CF394B98277531631 at LEMAIL01 dot le dot imgtec dot org> <87ha7j8b1v dot fsf at sandifor-thinkpad dot stglab dot manchester dot uk dot ibm dot com> <87bnxlbq2w dot fsf at talisman dot default>
> Richard Sandiford <rdsandiford@googlemail.com> writes:
>> Andrew Bennett <Andrew.Bennett@imgtec.com> writes:
>>> Hi,
>>>
>>> I have noticed that a patch was placed in bugzilla to do this change, but it
>>> does not appear to have been pushed. I was wondering if anyone could comment
>>> why this is the case?
>>>
>>> The bugzilla URL is the following:
>>>
>>> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57754
>>
>> Looks OK if it passes testing. We'll need a name and email address for
>> the commit though.
>
> Following the discussion on binutils@ I committed the patch as follows.
> I slightly tweaked it so that the MIPS64r2 processors stayed in
> alphabetical order (which also means that mips-tables.opt doesn't
> need to be regenerated).
>
> Sorry again for the delay.
Thats fine. Many thanks for sorting this out so promptly.
Regards,
Andrew