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Re: code-gen options for disabling multi-operand AArch64 and ARM instructions
- From: Laszlo Ersek <lersek at redhat dot com>
- To: Richard Biener <richard dot guenther at gmail dot com>
- Cc: GCC Development <gcc at gcc dot gnu dot org>, ard dot biesheuvel at linaro dot org, kevin at scrye dot com, perobins at redhat dot com, fweimer at redhat dot com, ffidenci at redhat dot com, berrange at redhat dot com, drjones at redhat dot com, jeremy dot linton at arm dot com, pwhalen at redhat dot com, jsmith dot fedora at gmail dot com, samuel-rhbugs at sieb dot net, dominik at greysector dot net, pbrobinson at gmail dot com, jcm at redhat dot com, marc dot zyngier at arm dot com, christoffer dot dall at arm dot com
- Date: Tue, 5 Jun 2018 15:07:14 +0200
- Subject: Re: code-gen options for disabling multi-operand AArch64 and ARM instructions
- References: <5102cfdf-1dc7-e257-77f3-eb8335eae4b8@redhat.com> <CAFiYyc3vJoXJ7VkMoyndtERdkjxsJskDkY14BE+xTuyeTaRL+Q@mail.gmail.com>
On 06/05/18 13:30, Richard Biener wrote:
> On Mon, Jun 4, 2018 at 8:11 PM Laszlo Ersek <lersek@redhat.com> wrote:
>>
>> Hi!
>>
>> Apologies if this isn't the right place for asking. For the problem
>> statement, I'll simply steal Ard's writeup [1]:
>>
>>> KVM on ARM refuses to decode load/store instructions used to perform
>>> I/O to emulated devices, and instead relies on the exception syndrome
>>> information to describe the operand register, access size, etc. This
>>> is only possible for instructions that have a single input/output
>>> register (as opposed to ones that increment the offset register, or
>>> load/store pair instructions, etc). Otherwise, QEMU crashes with the
>>> following error
>>>
>>> error: kvm run failed Function not implemented
>>> [...]
>>> QEMU: Terminated
>>>
>>> and KVM produces a warning such as the following in the kernel log
>>>
>>> kvm [17646]: load/store instruction decoding not implemented
>
> This looks like a kvm/qemu issue to me. Whatever that exception syndrome
> thing is, it surely has a pointer to the offending instruction it could decode?
I believe so -- the instruction decoding is theoretically possible (to
my understanding); KVM currently doesn't do it because it's super
complex (again, to my understanding).
Thanks
Laszlo