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RE: Question about "instruction merge" pass when optimizing for size

(It appears I accidentally dropped the mailing list)


> On 08/19/2015 02:38 PM, DJ Delorie wrote:
> > I've seen this on other targets too, sometimes so bad I write a quick
> > target-specific "stupid move optimizer" pass to clean it up.
> >
> > A generic pass would be much harder, but very useful.
> More important is to determine *why* we're getting these patterns.  In
> the IRA/LRA world, they should be a lot less common.
> Jeff

AFAIU LRA is less likely to remove the moves if it didn't
introduce itself.

In one specific MIPS case for 64-bit, the moves are inserted
for the sign-extension but IRA spills some of the allocnos and
assigns different hard register for the output operand in the move
as the initial register is call clobbered and the move proves to be
difficult to remove later. I found tricky to remove the move
in the register allocator and my current approach is to exploit the regname
pass to link some of the chains and rename the input registers to
turn the move into a no-op as Matthew already mentioned.

I agree that it would be ideal to do the right thing
in IRA/LRA but the heuristic is sensitive to changes.


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