This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Paradoxical subreg reload issue


Aurelien Buhrig <aurelien.buhrig.gcc@gmail.com> writes:

> I have an issue (gcc 4.6.3, private bacakend) when reloading operands of
> this insn:
> (set (subreg:SI (reg:QI 21 [ iftmp.1 ]) 0)
>      (lshiftrt:SI (reg/v:SI 24 [ w ]) (const_int 31 [0x1f]))
>
> The register 21 is reloaded into
> (reg:QI 0 r0 [orig:21 iftmp.1 ] [21]), which is a HI-wide hw register.
> Since it is a BIG_ENDIAN target, the SI subreg regno is then -1.
>
> Note that word_mode is SImode, whereas the class r0 belongs to is
> HI-wide. I don't know if this matters when reloading.
>
> I have no idea how to debug this, if it is a backend or a reload bug.
> Any idea?

Where did that insn come from?  It looks like it really wants to be

(set (reg:QI 21)
     (truncate:QI (lshiftrt:SI (reg:SI 24) (const_int 31))))

Ian


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]