Re: SMS in gcc4.0

[Mostafa Hagog <MUSTAFA at il dot ibm dot com>]

Steven Bosscher <stevenb@suse.de> wrote on 01/06/2005 17:35:20:

> On Wednesday 01 June 2005 16:43, Canqun Yang wrote:
>
> > 3) The counted loop register 'ar.lc' of IA-64 can not be
> > updated  directly. Another temporary register is needed
> > to evaluate the value of the actural loop count after
> > SMS schedule, and assign its value to 'ar.lc'.
>
> Actually, should SMS just not update the loop register in place?
> I never figured out why it tries to produce a sub insns (using
> gen_sub2_insn which is also wrong btw).

The subtraction is required because SMSed kernel is always executed less
times than the original kernel of the loop. This difference is actually the
level of interleaving (parallelism) we get from SMS.
As to the subtraction for IA-64; I expect that the gen_sub2_insn handles
the subtraction correctly and generate the required RTL to do the
subtraction according to the machine description. If it requires additional
moves this is due to a target limitation, which means this is not the
problem of SMS, it should be somewhere in the machine description.
Mostafa.