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[RFC] MIPS, use trap instead of break to detect divide by zero
- From: David Daney <ddaney at avtrex dot com>
- To: gcc at gcc dot gnu dot org
- Date: Wed, 30 Jun 2004 23:26:11 -0700
- Subject: [RFC] MIPS, use trap instead of break to detect divide by zero
3.4.x and 3.5 (and earlier versions as well) use a combination of a
branch and the break instruction to detect divide by zero.
MIPS2 and above processors seem to all have a trap instruction that can
do the same job in one instruction. Using a trap instead of branch and
break can save at least one instruction per divide.
The attached patch is against 3.4.1. 3.5 would require a slightly
different version, but the idea is the same.
This is the code generated before:
div $0,$4,$5
bne $5,$0,1f
nop
break 7
1:
mflo $2
j $31
nop
And after:
div $0,$4,$5
teq $5,$0,7
mflo $2
j $31
nop
Opinions about this?
David Daney.
? gcc/doc/HTML
Index: gcc/config/mips/mips.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.c,v
retrieving revision 1.362.4.13
diff -u -p -r1.362.4.13 mips.c
--- gcc/config/mips/mips.c 28 Jun 2004 13:58:42 -0000 1.362.4.13
+++ gcc/config/mips/mips.c 1 Jul 2004 05:46:20 -0000
@@ -9239,6 +9239,8 @@ mips_output_division (const char *divisi
if (TARGET_MIPS16)
return "bnez\t%2,1f\n\tbreak\t7\n1:";
+ else if (TARGET_HAS_TRAP)
+ return "teq\t%2,%.,7";
else
return "bne\t%2,%.,1f%#\n\tbreak\t7\n1:";
}
Index: gcc/config/mips/mips.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.h,v
retrieving revision 1.310.4.6
diff -u -p -r1.310.4.6 mips.h
--- gcc/config/mips/mips.h 11 Mar 2004 21:52:33 -0000 1.310.4.6
+++ gcc/config/mips/mips.h 1 Jul 2004 05:46:21 -0000
@@ -254,6 +254,8 @@ extern const struct mips_cpu_info *mips_
#define TARGET_CHECK_ZERO_DIV (!(target_flags & MASK_NO_CHECK_ZERO_DIV))
+#define TARGET_HAS_TRAP (mips_isa > 1)
+
#define TARGET_BRANCHLIKELY (target_flags & MASK_BRANCHLIKELY)
#define TARGET_FIX_SB1 (target_flags & MASK_FIX_SB1)