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Re: My problem on x86-64


On Mon, 26 Jan 2004, Richard Kenner wrote:

> Now my only remaining problem is the ICE in reg-stack.c that I mentioned
> a while ago.

This problem can be reduced to this C++ testcase (compile with -O2)

------------- snip ------------
typedef _Complex long double LC;

LC div (void);

long double bla (void)
  long double l = 0;
  try {
    l = (long double) __imag__ div ();
  } catch (...) {}
  return l;
------------- snap ------------

It ICEs due to the same reasons you already analyzed, but for Honza I'll 
repeat here:

The problem is, that the block ending the call has only st(1) live, 
because only the imag part (i.e. the high part) is used after the call.  
The destination of the abnormal edge (correctly) has no fp regs live.  
compensate_edges does a sanity test specifically for abnormal call edges, 
and expects that st(0) is live unconditionally, and also accepts if st(1) 
is live (specifically for complex values).

But this sanity test doesn't consider complex values which are partially 
live, i.e. st(1) live but st(0) not.  I'm not sure if the rest of 
reg-stack works correctly in this situation, but if yes, then this patch 
should make it not hickup in this situation (not tested except that it 
compiles, and doesn't make the testcase ICE).

Honza: Will reg-stack create the correct compensation code in this case?

Index: reg-stack.c
RCS file: /cvs/gcc/gcc/gcc/reg-stack.c,v
retrieving revision 1.141
diff -u -p -r1.141 reg-stack.c
--- reg-stack.c	21 Jan 2004 20:40:03 -0000	1.141
+++ reg-stack.c	26 Jan 2004 15:44:31 -0000
@@ -2586,14 +2586,12 @@ compensate_edge (edge e, FILE *file)
       abort ();
-      /* We are sure that there is st(0) live, otherwise we won't compensate.
-	 For complex return values, we may have st(1) live as well.  */
-      if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1))
-        SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1);
-      GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
-      abort ();
-    eh2:
+      /* We are sure that at least one of st(0) or st(1) is live
+         (otherwise we wouldn't have been called).  Only st(1) is live
+	 in case of complex values whose real part (in st(0)) was ignored.  */
+      if (!TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG)
+          && !TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1))
+        abort ();
       target_stack->top = -1;

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