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RE: word alignment for non fp/sp register pointers for SPARClet port
- From: "Nitin Gupta" <ngupta at GlobespanVirata dot com>
- To: "Richard Henderson" <rth at redhat dot com>
- Cc: <gcc at gcc dot gnu dot org>
- Date: Fri, 29 Aug 2003 21:42:33 +0530
- Subject: RE: word alignment for non fp/sp register pointers for SPARClet port
> On Wed, Aug 27, 2003 at 08:31:50PM +0530, Nitin Gupta wrote:
> > I know that this is not inline with SPARC (hence SPARClet)
> > ABI, but our malloc and all of system is based on old
> > SPARC ABI. Till now we were using egcs 1.1 which is based
> > on old sparclet ABI. Now since we are migrating to GCC 3.2
> > and latter GCC 3.3 we are facing this problem. Since it
> > is not possible to change the whole system s/w so soon,
> > I'm trying to fix GCC as per old ABI.
> The "old abi" also assumed double-word alignment for double-word
> values. There did exist peepholes to do the same thing that the
> current compilers do; if they weren't as effective, that was a bug.
> As for the rest of this, it would *really* be much less effort to
> just replace the malloc on your system with something not broken.
> You don't have to replace "the whole system s/w", just provide a
> replacement malloc.
Its not just the malloc. There is many there modules/application which
manage there own pools in specific ways. Also since its a embedded
target, the applications are always memory starved. The whole objective
of moving to a new toolchain was to squeze extra performace out of the
processor. However aligning to 8 byte boundary would ask for another
0-4 byte per structure which we not in position to support.
I know my requirement might be very specific and may not be of interest
of many people on the list. However I'm working on it and seeking help
of experts, if they can provide any pointers towards the solution of
the problem. Any help would be greatly appreciated.
Thanks for your time and support.