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Re: Shifts by constants > 31 may generate illegal sparc assembleroutput

From: Jim Wilson <wilson at tuliptree dot org>
To: Martin Husemann <martin at NetBSD dot ORG>
Cc: gcc at gcc dot gnu dot org
Date: Mon, 25 Aug 2003 19:55:27 -0700
Subject: Re: Shifts by constants > 31 may generate illegal sparc assembleroutput
References: <20030823150844.GA18889@NetBSD.ORG>

Martin Husemann wrote:

The test program in [Bug c/11965] as well as real world code may cause gcc 3.3.1
to emit shifts by constants > 31 bit as illegal sparc code (if compiling for
64 bit targets).

This doesn't have anything to do with the target word size. The predicates for the sparc shift patterns accept any 13-bit constant, so if the assembler doesn't, then we need to fix it before emitting assembler.

ChangeLog: use 64bit shift instructions where apropriate if shifting >31 bits.

Using 64-bit shift instructions doesn't make any sense for SImode (32-bit) operations. We either always truncate the shift count if it is a constant (as mips.md does), or we fix the predicate to only accept 5-bit constants (as ia64.md does).

Doing it the same way as the mips is easier.

The same problem is also present in the DImode shift patterns, so they should be fixed also the same way. -- Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com

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