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Re: RFC: using clz for comparing to zero on the tree level.
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Richard Henderson <rth at redhat dot com>
- Cc: David Edelsohn <dje at watson dot ibm dot com>, Andrew Pinski <pinskia at physics dot uc dot edu>, gcc at gcc dot gnu dot org, Richard dot Earnshaw at arm dot com
- Date: Fri, 09 May 2003 15:27:25 +0100
- Subject: Re: RFC: using clz for comparing to zero on the tree level.
- Organization: ARM Ltd.
- Reply-to: Richard dot Earnshaw at arm dot com
> On Thu, May 08, 2003 at 12:36:35PM -0400, David Edelsohn wrote:
> > Not Alpha and not ARM V5, which have single instruction clz?
>
> PPC:
> cntlz tmp, in
> srwi out, tmp, 5
>
> Alpha:
> cmpeq in, 0, out
>
> ARM:
> cmp in, #0
> movne out, #0
> moveq out, #1
>
> Hmm, so it might be a win for ARM. You'll have to work out
> with Richard Earnshaw how you want to arrange these costs.
> At the moment arm_rtx_costs doesn't tell you that the SEQ
> operation takes 3 instructions.
for an seq expander the shortest (though not necessarily fastest) sequence
on ARMv5 would be
clz t1, in
mov out, t1, lsr #5
But that's probably best left as a back-end expansion of the canonical RTL:
(set (out) (eq (in) (const_int 0)))
which can be expanded after reload with a split pattern.
R.