problems with PIC, casesi patterns on m68k

[Peter Barada <pbarada at mail dot wm dot sps dot mot dot com>]

I am currently trying to get -fPIC code running on a ColdFire v4e core,
and I've been slowly beating gcc into shape to use the newer concept
of PIC by using (CONST (UNSPEC [(...)] #)) constructs to hold the
symbol/label refs when PIC is active.

Unfortunately in the process, access to the case vector table
label was through the GOT, something which is *very* bad, especially
in ld.so where it attempts to apply the relocations to the GOT by
using a switch table(which fails miserably because the GOT hasn't been
relocated yet!).

I looked over the other .md files, and I decided to try the following
instead of the awkward mix-n-match code found in m68k.{c,md,h}:

(define_expand "casesi"
  [(set (match_dup 5)
	(minus:SI (match_operand:SI 0 "register_operand" "")
		  (match_operand:SI 1 "nonmemory_operand" "")))
   (set (cc0)
	(compare:CC (match_dup 5)
		    (match_operand:SI 2 "nonmemory_operand" "")))
   (set (pc)
	(if_then_else (gtu (cc0)
			   (const_int 0))
        (label_ref (match_operand 4 "" ""))
		      (pc)))
   (parallel
    [(set (pc)
	  (mem:SI (plus:SI (mult:SI (match_dup 5)
				    (const_int 2))
     (unspec:SI [(label_ref (match_operand 3 "" ""))] UNSPEC_CASESI))))
     (clobber (match_scratch:SI 6 ""))])]
  ""
  "
{
  operands[5] = gen_reg_rtx(SImode);
}")

(define_insn "*casesi_insn"
  [(set (pc)
	(mem:SI (plus:SI (mult:SI (match_operand:SI 0 "register_operand" "r")
				  (const_int 2))
   (unspec:SI [(label_ref (match_operand 1 "" ""))] UNSPEC_CASESI))))
   (clobber (match_scratch:SI 2 "=a"))]
  ""
  "*
{
  int r0 = REGNO(operands[0]);
  int l1 = CODE_LABEL_NUMBER (operands[1]);
  int r2 = REGNO(operands[2]);
  ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"LI\", l1);
  asm_fprintf (asm_out_file, \"\\tmove.w %LL%d-%LLI%d-2.b(%Rpc,%s),%s\\n\",
               l1, l1, reg_names[r0], reg_names[r2]);
  asm_fprintf (asm_out_file, \"\\tjmp %Rpc@(2,%s.l)\\n\", reg_names[r2]);
  return \"\";
}")

What I'm not proud about at all is the grody code in *casesi_insn to
emit the internal label used for the PC relative word access to the
case vectors.  I tried to use asm_out_insn, but that fails since the
internal label (%LLIn) which is used to anchor the pc-relative
access.  Another problem is that asm_fprintf doesn't handle '%.'
correctly. And yet another problem is that this is for the Motorola
syntax and not the MIT syntax.  All the permutations can get mind-boggling.

Can anyone suggest other asm_* functions I should consider using for
this?

1) Is the SGS assembler still supported for m68k?
2) Which targets in m68k have been depricated?
3) How do I get -dp to print the insn number and pattern in the .md file
   for this pattern?
4) Is this the right approach or am I out in left field somewhere?

Output from this pattern(which matches previous output before the
whole PIC rewrite) looks like:

	.text
	.align	2
	.globl	bar2
	.type	bar2,@function
bar2:
	link.w %a6,#0
	move.l 8(%a6),%d0	| 4	*m68k.md:1031/1
	moveq.l #7,%d1	| 72	*m68k.md:1031/1
	cmp.l %d0,%d1	| 42	*m68k.md:569/1
	jbcs .L10	| 43	bltu
.LI11:
	move.w .L11-.LI11-2.b(%pc,%d0),%a0
	jmp %pc@(2,%a0.l)
	.align	2
.L11:
	.word .L6-.L11
	.word .L6-.L11
	.word .L6-.L11
	.word .L6-.L11
	.word .L9-.L11
	.word .L9-.L11
	.word .L10-.L11
	.word .L9-.L11
	.align	2
.L6:
	moveq.l #1,%d0	| 20	*m68k.md:1031/1
	jbra .L1	| 21	jump
	.align	2
.L9:
	moveq.l #9,%d0	| 30	*m68k.md:1031/1
	jbra .L1	| 31	jump
	.align	2
.L10:
	moveq.l #12,%d0	| 38	*m68k.md:1031/1
.L1:
	unlk %a6
	rts
.Lfe1:
	.size	bar2,.Lfe1-bar2
	.ident	"GCC: (GNU) 3.2.1"



Any help is appreciated!

-- 
Peter Barada                                   Peter.Barada@motorola.com
Wizard                                         781-852-2768 (direct)
WaveMark Solutions(wholly owned by Motorola)   781-270-0193 (fax)