strange CSE behaviour with comparison operation

[Dan Towner <dant at picochip dot com>]

Hi all,

I am writing a port of gcc for a 16-bit VLIW. Up until now, I have used 
the cbranch mechanism to handle branches. However, I now changed to 
using an explicit compare/branch sequence (copied from the ARM), which 
decomposes the branch so that it can be scheduled. I now have a problem 
with the following code:

  int value = (constZero != 1)

(constZero is a global int, with value 0).

This generates code which looks roughly like this:

  r0 := 0
  r5 := mem(constZero)
  compare (r5, 1)
  if (EQ) goto label
  r0 := r5                       (*)
label:

Notice that when constZero == 1, the value of r0 will be 0 on exit 
(correct). If constZero != 1, the value of r0 is set to r5, which is 
actually constZero, and hence also ends up as zero. You can't win!

The problem appears to be in the CSE pass. The code compiles correctly 
without optimisation (i.e., it sets r0 := 1 at the marked instruction). 
Having looked through the CSE pass code, it appears that the instruction 
r0 := 1 is replaced by r0 := r5, because r5 has somehow been made 
equivalent to (const_int 1). I haven't been able to figure out why this 
equivalence has been setup though. Any suggestions?

I also notice that after CSE has run, the marked instruction has had a 
REG_WAS_0 note attached to it (pointing at the very first r0 := 0 
instruction). Is this significant?

Thanks,

  Dan.

=============================================================================
Daniel Towner
picoChip Designs Ltd., Riverside Buildings, 108, Walcot Street, BATH, 
BA1 5BG
dant@picochip.com
07786 702589