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Re: Illegal code generation: gcc-3.2 --target=m68k-elf
- From: Richard Henderson <rth at redhat dot com>
- To: Peter Barada <pbarada at mail dot wm dot sps dot mot dot com>
- Cc: gcc at gcc dot gnu dot org, Peter dot Barada at motorola dot com
- Date: Mon, 21 Oct 2002 23:27:37 -0700
- Subject: Re: Illegal code generation: gcc-3.2 --target=m68k-elf
- References: <200210212322.g9LNMOX20258@hyper.wm.sps.mot.com>
On Mon, Oct 21, 2002 at 07:22:24PM -0400, Peter Barada wrote:
> (insn 690 689 691 (set (subreg:SI (reg/v:HI 40) 0)
> (plus:SI (subreg:SI (reg/v:HI 40) 0)
> (const_int 1 [0x1]))) 99 {*addsi3_5200} (nil)
> (nil))
>
> Looks like combine put the two instructions together, but there is no
> instruction in the ColdFire that can allow for this to happen (I guess
> it found the pattern for addhi3 and assumed that it is valid for
> ColdFire?).
No. The constraints for addsi3_5200 say it's valid. And indeed
it would be if R40 were allocated to a register.
> (insn 690 1150 691 (set (mem:SI (plus:SI (reg/f:SI 14 %a6)
> (const_int -428 [0xfffffe54])) [0 rotate S4 A16])
> (plus:SI (mem:SI (plus:SI (reg/f:SI 14 %a6)
> (const_int -428 [0xfffffe54])) [0 rotate S4 A16])
> (reg:SI 0 %d0))) 99 {*addsi3_5200} (nil)
> (nil))
>
> Now the RTL is bogus since the store to memory is *SImode* wide
> whereas the original variable is HImode.
Are you _sure_ you're showing us everything? There should have
been some inefficient jiggery-pokery with subreg reloads. This
should not have been the real stack slot for R40, but somewhere
else.
r~