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Improving Alias Analysis
- From: "Sanjiv Kumar Gupta, Noida" <sanjivg at noida dot hcltech dot com>
- To: gcc at gcc dot gnu dot org
- Date: Thu, 17 Oct 2002 17:48:09 +0530
- Subject: Improving Alias Analysis
The current alias analysis in gcc is not capable
of disambiguating between certain obvious cases of
memory references. For example, consider two pointers
r101, r102 and some simple address arithmatic
r101 = r100 + 8;
r102 = r100 + 32;
64-bit dereference of r101
64-bit dereference of r102
The present implementation says r101 and r102 aliases
each other. I noticed this problem for SH4. SH4 does
not allow register+offset addressing for floating point
load/stores. I fear that the same problem could also be
there for IA64.
After digging into some code, I found out that gcc has
no in-built mechanism to figure out that these
pointers have been computed to contain distinct values.
This is primarily because it does not record sufficient
info for alias analysis, by which, it can know what
values various registers are supposed to contain
at a particular program point.
In addition to the above case , there might be exisiting,
other cases of failures.
I intend to improve the alias analysis so that it can handle
such cases. For that, I am currently thinking of possible
solutions. One solution could be backward traversing of the
list of RTXs and finding out if the two pointers differ.
The other could be maintaining symoblic values for regsiters
at each instruction level.
Please let me know your ideas for a good solution.