This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: load multiple
- From: N V Krishna <nvk at cs dot purdue dot edu>
- To: Andrew Haley <aph at redhat dot com>
- Cc: gcc at gnu dot org
- Date: Mon, 14 Oct 2002 07:36:24 -0500 (EST)
- Subject: Re: load multiple
# > Hi,
# > I am working on a ARM port of gcc. I want to insert 'load
# > multiple' instructions in the code. If the registers are sequential then I
# > can see the function arm_gen_load_multiple. But I am unable to insert
# > instructions , where the destination registers list is not sequential.
# >
# > ldmea r1,{r2,r5}
# >
# > Can anyone suggest the debug_rtl output for the above type of instruction?
#
#Can't you use just run ARM gcc and dump the RTL to see what it looks
#like?
No. As I wrote before the only ldm instruction that I am seeing without
consecutive registers is the last load to pop off registers and that
instruction is inserted without using RTL.
Warm regards
Krishna