Re: powerpc & unaligned block moves with fp registers

[David Edelsohn <dje at watson dot ibm dot com>]

	DJ's issue is not a problem of avoiding FPRs, it is avoiding
mis-aligned FPR moves.  For the non-strict case, this is a good
improvement which Dale and I agree with.

	Your issue is avoiding FPRs for DImode completely.  You might be
able to do that with a specialized definition of SLOW_UNALIGNED_ACCESS in
the rs6000_emit_move function as I am recommending for DJ's problem.
DImode using FPRs only is used by movdi which always goes through
rs6000_emit_move.  If you define SLOW_UNALIGNED_ACCESS so that DImode
always reports true and we use a variant of DJ's conversion so SImode,
FPRs never would be used by movdi.  I think this method would avoid the
multiple movdi matcher patterns.


	In other words:

1) No DImode FPRs.
2) Strictly aligned FPRs
3) Word-aligned FPRs
4) Arbitrary alignment FPRs.

	Dale and I want 3, which is the recommendation for PowerPC.  DJ
wants 2.  You want 1.

	I believe that all options can be satisfied via appropriate
definitions of SLOW_UNALIGNED_ACCESS when used by rs6000_emit_move.
Please correct me if I am wrong.

	My proposal is catch DImode moves in rs6000_emit_move and redefine
SLOW_UNALIGNED_ACCESS as necessary for the limitations imposed by these
various systems.

Thanks, David