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Re: powerpc & unaligned block moves with fp registers
- To: dje at watson dot ibm dot com
- Subject: Re: powerpc & unaligned block moves with fp registers
- From: DJ Delorie <dj at redhat dot com>
- Date: Thu, 1 Nov 2001 18:35:26 -0500
- CC: gcc at gcc dot gnu dot org
- References: <200111012259.RAA28768@makai.watson.ibm.com>
> If a nearly aligned reference will not work, why isn't this a case
> for strict-align instead of a performance issue? If you are saying that
> the user absolutely cannot suffer an alignment exception, that seems like
> the intention of strict-align. Otherwise it *is* an issue of degrees.
In the case I was originally given, the chip could do misaligned
integer loads but not misaligned FP loads (I don't know which chip).
-mno-strict-align allows more compact code/data, so it was too costly
to give it up just to handle this one problem case properly.
> As I mentioned before, why not disallow the DImode move instead of
> trying to get GCC to select the right register preference for DImode. If
> you don't use the 64-bit FPRs, it really IS NOT a DImode move on a 32-bit
> system.
Because we can't disallow an unaligned DI move to an FP register.
You'd never be able to load a 64-bit integer into an FP register
without them. Although, if that is unaligned too, it becomes a choice
between gcc aborting or your program aborting. I'd choose the program ;-)
And emit_move_insn has no provisions for a movMM failing.