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Using and clobbering hard regs in parallel
- To: gcc at gcc dot gnu dot org
- Subject: Using and clobbering hard regs in parallel
- From: Stephen Clarke <Stephen dot Clarke at st dot com>
- Date: Thu, 19 Jul 2001 18:32:05 -0700
- Organization: STMicroelectronics
Is it valid in RTL to read a hard reg in one branch of a parallel,
and clobber the same hard reg in another branch?
For example, when compiling for SH, I get the following instruction:
(insn 20 19 22 (parallel[
(set (reg:SI 54)
(udiv:SI (reg:SI 4 r4)
(reg:SI 5 r5)))
(clobber (reg:SI 18 t))
(clobber (reg:SI 17 pr))
(clobber (reg:SI 4 r4))
(use (reg:SI 55))
] ) -1 (nil)
(expr_list:REG_EQUAL (udiv:SI (mem/f:SI (reg/f:SI 50 virtual-stack-vars) 0)
(mem/f:SI (plus:SI (reg/f:SI 50 virtual-stack-vars)
(const_int 4 [0x4])) 0))
(insn_list:REG_RETVAL 17 (nil))))
where r4 is read by the set, but also clobbered in another branch
(this instruction is part of a libcall).
The gcc manual says this is okay for pseudo regs:
"There is one other known use for clobbering a pseudo register in
a parallel: when one of the input operands of the insn is also clobbered
by the insn. In this case, using the same pseudo register in the clobber
and elsewhere in the insn produces the expected results."
but is it also okay for hard regs?
(This is a leading question: I have a problem with flow.c, combine.c
and an instruction like this, but I'd like to make sure that this
instruction is reasonable before sharing the main problem.)
Thanks,
Steve.
--
Stephen Clarke, Micro Cores & Development Tools, STMicroelectronics
Phone:1-408-922-4062, Fax:1-408-895-3069, mailto:Stephen.Clarke@st.com
Mail: STMicroelectronics, 1060 E. Brokaw Rd., San Jose, CA 95131.