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Re: extv, extzv and insv patterns
- To: Roman Lechtchinsky <rl at cs dot tu-berlin dot de>
- Subject: Re: extv, extzv and insv patterns
- From: David Edelsohn <dje at watson dot ibm dot com>
- Date: Tue, 17 Jul 2001 11:16:47 -0400
- cc: gcc at gcc dot gnu dot org
>>>>> Roman Lechtchinsky writes:
Roman> Which mode is operand 3 (the starting bit) supposed to be relative to
Roman> (which is important if BITS_BIG_ENDIAN is 1)? Is it the mode of operand 1
Roman> or word_mode? The code which calls these patterns seems to generally (but
Roman> not always :-) assume the latter.
Operands 2 and 3 only are generated as constants, so the mode is
not extremely important. Note that extzv does not have a mode in the
name, so there is only one pattern for a processor which supports multiple
bit-sizes. The tradition is to use the word size for the smallest
bit-size of the processor (e.g., SImode for 32/64 processor).
I believe that bits are counted from the left. I know that
PowerPC needs to reverse the bit numbering when emitting the operands to
instructions.
In general you should look at other ports to answer some of these
questions. Once you figure out the answers, we would be happy to accept
patches to the GCC documentation to clarify these issues.
Thanks, David