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Re: call_insn's and argument locations
- To: <law at redhat dot com>
- Subject: Re: call_insn's and argument locations
- From: Chris Lattner <sabre at nondot dot org>
- Date: Mon, 2 Jul 2001 12:30:47 -0500 (CDT)
- Cc: David Edelsohn <dje at watson dot ibm dot com>, <gcc at gcc dot gnu dot org>
> > Instead of a tree representation, I believe we should shoot for more
> > of a 3 address code type IR (similar in form to RTL). There are many
> > optimizations that would be useful that operate on 3AC.
> Why create a new IR at all when we can get the same capabilities with
> RTL by adding the necessary features to it?
No reason at all... in fact, that's what I'm advocating. It's only a
"new" IR by virtue of the fact that it's different from what we already
have: hopefully just an extension.
> > 2. Architecture independence:
> While I believe it's a useful goal, I don't know if it's actually
> achievable, at least in a reasonable timeframe. I would keep this as a
> goal, but allow ourselves the flexibility to have some target dependent
> stuff in the IR with the goal of eventually stamping it out.
Sure, of course we want to be able to implement things incrementally...
for debugging and testing as well as just "getting something out the
door"...
> > 3. SSA Representation:
> > SSA is a useful representation for optimizations for many reasons, and
> > I think that it is feasible to make it be the primary representation
> > for the IR (SGI's compiler also uses SSA for the primary IR).
> I don't think this is going to be feasible. At least not anytime soon.
>
> Also note that SGI's isn't pure SSA. They use SSA in their high level
> optimizers, but I'm pretty sure they lose SSA form once they go into their
> code generator (which has a number of optimizations unto itself).
Definately. Please don't get me wrong. I'm not trying to get rid of RTL
or GCC's late stages. In fact, I consider GCC's instruction selection and
late optimization phases to be the best part of GCC.
I'm arguing that we should do something like this:
Frontend -> Tree -> {TreeSSA optionally -> } -> "new IR" -> RTL -> .s
Personally, I think that register allocation is the "appropriate" time to
go from "New IR" to RTL, but that is a long term goal. The nice thing
about this model (just as you have said before) is that it can all be
implemented incrementally...
-Chris
http://www.nondot.org/~sabre/os/
http://www.nondot.org/MagicStats/