This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]

Re: SSE1 support anytime soon?


Hi,

Tim Prince wrote:

> I meant only to point out that P4 is capable of mixing mmx and x87
> instructions, while P-III is not.

I see. Thanks for the clarification. Honestly I don't know much of the PIV
architecture (here in Italy many popular electronics journals are harshly
criticizing it and pushing the competitors...)

> My impression has been that Jan was most
> interested in supporting P4; it is a bit late in the game to be putting a
> serious effort into P-III alone.  I recall him saying he had plans to deal
> with the Windows alignment problem, but I don't suppose that is high on the
> impressive list of projects undertaken by SuSE (of which I know little).

What are you saying seems very reasonable to me. I think Jan is also very
interested in x86-64 (see above... ;)

> I installed the prerelease binutils which was announced yesterday on
> cygwin, and was impressed by the way it worked out of the box, but then
> found, as you did, that I need gcc-3.1 to attempt any sse.

Right.

> I haven't seen
> anything about which targets are intentionally supported with 4-byte, and
> which with 16-byte alignments, but the 4-byte alignments are (apparently)
> required to support the gcc-2.95 version of g++ with newlib, so we are
> stuck with breakage somewhere.  I suppose that targets which use the
> current glibc should support 16-byte alignments.
>
>  Speaking of disappointments in gcc-3.0, I see that the i386 code generated
> by the truncate float (and double) to int operation is inferior to that of
> gcc-2.95, decidedly so when run on P4.

This poor truncate is loosing ground every day more... By chance I have just
read (on truncate in PII vs Pentium):

    www.tantalon.com/pete/cppopt/main.htm

>  The operations with the floating
> point control word need to be done entirely with 16-bit operations, as
> gcc-2.95 did, by or'ing the byte mask into the short value before it is
> used by the fldcw instruction, not by a separate byte store to memory.
> sse2 of course has single instructions for this, both single and parallel
> versions.

>From this interchange I learned many things!
Thanks again!

Now I'm really eager to see real Gcc3.1 benchmarks for PIII and PIV!!!

Do you have any of those???

Cheers,
Paolo Carlini.



Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]