Re: cross gcc-2.95.2 for ARM

[Nick Clifton <nickc at redhat dot com>]

Hi Ben,

> The old toolchain would compile a 16 bit write, such as:
> u_int16_t *addr, x;
> ...
> *addr = x;
> ...
> as an ldrh (load register halfword) instruction,

Presumably you mean an strh instruction (store half-word) since this
is write operation, not a read operation.

> which was good, because
> the hardware we were writing modules for could only handle 16 bit
> transfers, but when looking at two sections of disassembled code, the
> new toolchain seems to replace that one instruction with two ldrb (load
> register byte) instructions, which is bad, for the same reason ldrh is
> good.

Note - if you have hardware which cannot support the full range of bus
writes permitted by the ARM core (ie 8bit, 16bit and 32bit), then you
probably should not be trying to access them with ordinary, compiler
generated code.  Instead I would suggest that you use assembler source
files, or inline assembler in your C files.

Cheers
        Nick