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How to use branch registers in IA-64?
- To: <gcc at gcc dot gnu dot org>
- Subject: How to use branch registers in IA-64?
- From: Paolo Bonzini <bonzini at wbkst15 dot mach dot uni-karlsruhe dot de>
- Date: Wed, 10 Jan 2001 13:47:04 +0100 (CET)
Hello. I am working with GNU Smalltalk on an IA-64 and I found the
standard interpreter to be extremely slow -- about half the performance of
a traditional (non-VLIW) architecture.
The interpreter uses GCC's computed gotos to thread execution from
a bytecode to the next, so I tried to implement pipelining and
pre-decoding of the following bytecode. This slowed down performance
even more, while had been reported (on other VLIW architectures) to
improve it quite drastically!
The reason, as I found out by examining the assembly language source code,
is that GCC loads the branch register at the last minute rather than as
early as possible. Could it be possible to use a delay-slot like
mechanism to anticipate this loading? (My current solution is to specify
the branch register in a register...__asm__ directive, but it is
unsatisfactory because I have to reload the register manually when it is
overwritten by subroutines)