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Re: Stepanov results with development gcc
- To: bkorb at sco dot com (Bruce Korb)
- Subject: Re: Stepanov results with development gcc
- From: Joe Buck <jbuck at racerx dot synopsys dot com>
- Date: Fri, 8 Dec 2000 13:21:24 -0800 (PST)
- Cc: dberlin at redhat dot com (Daniel Berlin), dje at watson dot ibm dot com (David Edelsohn), lucier at math dot purdue dot edu (Brad Lucier), gcc at gcc dot gnu dot org
> > No, any report with a value < 1 is IMPERFECT, and large deviations
> > from 1 indicate a bug.
I say "imperfect" because all the loops are equivalent, so a perfect
compiler could get better code by always using the code for the fastest
loop for all loops
> By implication, that also means that 1.0 *may* be a bug:
> the level zero being misoptimized and hiding the abstraction
> penalty :-).
>
> Maybe level zero should be done by hand in assembler? :-}
It suffices, I think, to hand-verify the assembly for test0 (is it
reasonable?) and then ask for approximately 1.0 for other tests.
To figure out how we do on test0, it suffices to compile the following
function (equivalent to the main body of test0) and inspect the inner
loop:
----------------------------------------------------------------
void check(double);
void test0(double* first, double* last)
{
int n, pdiff = last - first;
double result = 0;
for (n = 0; n < pdiff; ++n) result += first[n];
check(result);
}
----------------------------------------------------------------
With the 20001120 snapshot, the inner loop was 4 instructions for ix86, 8
for Sparc; I believe that this is still true for current CVS. It's
obvious how to get 5 instructions on the Sparc (you get one fewer on the
ix86 because the load and floating add can be combined). What remains is
issues of pipeline bubbles and ILP: on a modern Sparc we should be able
to get 3 cycles/loop for the 5 instruction loop by correct scheduling.