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Re: recent arm.h change
- To: rearnsha at arm dot com
- Subject: Re: recent arm.h change
- From: Nick Clifton <nickc at cygnus dot com>
- Date: Thu, 30 Mar 2000 12:19:35 -0800
- CC: gcc at gcc dot gnu dot org
Hi Richard,
: Can you back it out on the branch as well?
Sure - I will check in the patch below.
: Also, you forgot to commit a ChangeLog entry.
Oops - sorry. I have now fixed this.
Cheers
Nick
2000-03-30 Nick Clifton <nickc@cygnus.com>
* config/arm/semi.h (ASM_SPEC): Restore definition.
(SUBTARGET_EXTRA_ASM_SPEC): Define if not already defined.
* config/arm/elf.h (ASM_SPEC): Restore definition.
(SUBTARGET_EXTRA_ASM_SPEC): Define if not already defined.
* config/arm/arm.h (ASM_SPEC): Remove definition.
(SUBTARGET_EXTRA_ASM_SPEC): Remove definition.
Index: arm.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/arm/arm.h,v
retrieving revision 1.49.2.15
diff -p -r1.49.2.15 arm.h
*** arm.h 2000/03/24 19:06:08 1.49.2.15
--- arm.h 2000/03/30 20:19:02
*************** Unrecognized value in TARGET_CPU_DEFAULT
*** 267,287 ****
#define SUBTARGET_CPP_SPEC ""
#endif
- #ifndef SUBTARGET_EXTRA_ASM_SPEC
- #define SUBTARGET_EXTRA_ASM_SPEC
- #endif
-
- #ifndef ASM_SPEC
- #define ASM_SPEC "\
- %{mbig-endian:-EB} \
- %{mcpu=*:-m%*} \
- %{march=*:-m%*} \
- %{mapcs-*:-mapcs-%*} \
- %{mapcs-float:-mfloat} \
- %{msoft-float:-mno-fpu} \
- %{mthumb-interwork:-mthumb-interwork} \
- " SUBTARGET_EXTRA_ASM_SPEC
- #endif
/* Run-time Target Specification. */
#ifndef TARGET_VERSION
--- 267,272 ----
Index: elf.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/arm/elf.h,v
retrieving revision 1.13.2.7
diff -p -r1.13.2.7 elf.h
*** elf.h 2000/03/24 19:06:09 1.13.2.7
--- elf.h 2000/03/30 20:19:02
*************** Boston, MA 02111-1307, USA. */
*** 36,41 ****
--- 36,57 ----
#define SUBTARGET_CPP_SPEC "-Darm_elf -D__ELF__"
#endif
+ #ifndef SUBTARGET_EXTRA_ASM_SPEC
+ #define SUBTARGET_EXTRA_ASM_SPEC
+ #endif
+
+ #ifndef ASM_SPEC
+ #define ASM_SPEC "\
+ %{mbig-endian:-EB} \
+ %{mcpu=*:-m%*} \
+ %{march=*:-m%*} \
+ %{mapcs-*:-mapcs-%*} \
+ %{mapcs-float:-mfloat} \
+ %{msoft-float:-mno-fpu} \
+ %{mthumb-interwork:-mthumb-interwork} \
+ " SUBTARGET_EXTRA_ASM_SPEC
+ #endif
+
/* The following macro defines the format used to output the second
operand of the .type assembler directive. Different svr4 assemblers
expect various different forms for this operand. The one given here
Index: semi.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/arm/semi.h,v
retrieving revision 1.2.10.4
diff -p -r1.2.10.4 semi.h
*** semi.h 2000/03/24 19:06:09 1.2.10.4
--- semi.h 2000/03/30 20:19:02
*************** Boston, MA 02111-1307, USA. */
*** 35,40 ****
--- 35,56 ----
#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME)
#endif
+ #ifndef SUBTARGET_EXTRA_ASM_SPEC
+ #define SUBTARGET_EXTRA_ASM_SPEC
+ #endif
+
+ #ifndef ASM_SPEC
+ #define ASM_SPEC "\
+ %{mbig-endian:-EB} \
+ %{mcpu=*:-m%*} \
+ %{march=*:-m%*} \
+ %{mapcs-*:-mapcs-%*} \
+ %{mapcs-float:-mfloat} \
+ %{msoft-float:-mno-fpu} \
+ %{mthumb-interwork:-mthumb-interwork} \
+ " SUBTARGET_EXTRA_ASM_SPEC
+ #endif
+
#include "arm/aout.h"
#undef CPP_APCS_PC_DEFAULT_SPEC