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Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.
- From: Andrew Pinski <pinskia at gmail dot com>
- To: Renlin Li <renlin dot li at foss dot arm dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, James Greenhalgh <James dot Greenhalgh at arm dot com>, Ramana Radhakrishnan <Ramana dot Radhakrishnan at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>
- Date: Tue, 27 Jun 2017 09:11:25 -0700
- Subject: Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.
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- References: <59368A74.2060908@foss.arm.com> <CA+=Sn1=wkMcNdA_jPE2vg86hYBareyqGOMMQMdxATN21DEviwQ@mail.gmail.com> <59527975.1060304@foss.arm.com>
On Tue, Jun 27, 2017 at 8:27 AM, Renlin Li <renlin.li@foss.arm.com> wrote:
> Hi Andrew,
>
> On 25/06/17 22:38, Andrew Pinski wrote:
>>
>> On Tue, Jun 6, 2017 at 3:56 AM, Renlin Li <renlin.li@foss.arm.com> wrote:
>>>
>>> Hi all,
>>>
>>> In this patch, a new integer register operand modifier 'r' is added. This
>>> will use the
>>> proper register name according to the mode of corresponding operand.
>>>
>>> 'w' register for scalar integer mode smaller than DImode
>>> 'x' register for DImode
>>>
>>> This allows more flexibility and would meet people's expectations.
>>> It will help for ILP32 and LP64, and big-endian case.
>>>
>>> A new section is added to document the AArch64 operand modifiers which
>>> might
>>> be used in inline assembly. It's not an exhaustive list covers every
>>> modifier.
>>> Only the most common and useful ones are documented.
>>>
>>> The default behavior of integer operand without modifier is clearly
>>> documented
>>> as well. It's not changed so that the patch shouldn't break anything.
>>>
>>> So with this patch, it should resolve the issues in PR63359.
>>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359
>>>
>>>
>>> aarch64-none-elf regression test Okay. Okay to check in?
>>
>>
>> I think 'r' modifier is very fragile and can be used incorrectly and
>> wrong in some cases really..
>
>
> The user could always (or be encouraged to) opt to a strict register
> modifier to enforce consistent behavior in all cases.
>
> I agree the flexibility might bring unexpected behavior in corner cases.
> Do you have any examples to share off the top of your head? So that we can
> discuss the benefit and pitfalls, and decide to improve the patch or
> withdraw it.
One thing is TImode is missing. I have an use case of __int128_t
inside inline-asm.
For me %r and TImode would produce "x0, x1". This is one of the
reasons why I said it is fragile.
>
>> I like the documentation though.
As an aside %H is not documented here. Noticed it because I am using
%H with TImode.
Thanks,
Andrew
>
> Thanks,
> Renlin
>
>
>>
>> Thanks,
>> Andrew
>>
>>>
>>> gcc/ChangeLog:
>>>
>>> 2017-06-06 Renlin Li <renlin.li@arm.com>
>>>
>>> PR target/63359
>>> * config/aarch64/aarch64.c (aarch64_print_operand): Add 'r'
>>> modifier.
>>> * doc/extend.texi (AArch64Operandmodifiers): New section.