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Re: [PATCH, 2/2][ARM]: New CPU support for Marvell Whitney
- From: Maxim Kuvyrkov <maxim dot kuvyrkov at linaro dot org>
- To: Xingxing Pan <xxingpan at marvell dot com>
- Cc: James Greenhalgh <james dot greenhalgh at arm dot com>, Nick Clifton <nickc at redhat dot com>, Paul Brook <paul at codesourcery dot com>, Ramana Radhakrishnan <ramana dot radhakrishnan at arm dot com>, Richard Earnshaw <richard dot earnshaw at arm dot com>, Kyrylo Tkachov <kyrylo dot tkachov at arm dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Xinyu Qi <xyqi at marvell dot com>, Liping Gao <lgao1 at marvell dot com>
- Date: Thu, 26 Feb 2015 12:07:50 +0300
- Subject: Re: [PATCH, 2/2][ARM]: New CPU support for Marvell Whitney
- Authentication-results: sourceware.org; auth=none
- References: <5493DF85 dot 6050309 at marvell dot com> <20141219093534 dot GA26486 at arm dot com> <5493FE08 dot 1050309 at marvell dot com> <549405FF dot 3050106 at marvell dot com> <54EDD14F dot 3010508 at marvell dot com> <20150225142032 dot GA10515 at arm dot com> <54EECE57 dot 5020105 at marvell dot com>
> On Feb 26, 2015, at 10:42 AM, Xingxing Pan <xxingpan@marvell.com> wrote:
...
> Expand several arm types.
>
> 2015-02-26 Xingxing Pan <xxingpan@marvell.com>
>
> * config/arm/types.md:
> (neon_logic): Expand to neon_logic_reg and neon_logic_imm.
> (neon_logic_q): Expand to neon_logic_reg_q and neon_logic_imm_q.
> (neon_from_gp): Expand to neon_from_gp and neon_from_gp_scalar.
> (neon_from_gp_q): Expand to neon_from_gp_q and neon_from_gp_scalar_q.
> (neon_to_gp): Expand to neon_to_gp and neon_to_gp_scalar.
> (neon_to_gp_q): Expand to neon_to_gp_q and neon_to_gp_scalar_q.
> * config/aarch64/aarch64-simd.md: Ditto.
> * config/aarch64/aarch64.md: Ditto.
> * config/aarch64/thunderx.md: Ditto.
> * config/arm/arm.md: Ditto.
> * config/arm/cortex-a15-neon.md: Ditto.
> * config/arm/cortex-a17-neon.md: Ditto.
> * config/arm/cortex-a57.md: Ditto.
> * config/arm/cortex-a8-neon.md: Ditto.
> * config/arm/cortex-a9-neon.md: Ditto.
> * config/arm/marvell-whitney.md: Ditto.
> * config/arm/neon.md: Ditto.
> * config/arm/xgene1.md: Ditto.
I think you are going overkill with this approach. Instead of encoding operand types in <INSN_TYPE>_<OPERAND_TYPE> values, it seems simpler to add a new operand_type attribute and set it on affected insns.
(define_attr "op_type" "imm,reg,scalar,other" (const_string "other))
then in define_insn (example from first hunk of your patch):
[(set_attr "type" "neon_load1_1reg<q>, neon_store1_1reg<q>,\
neon_logic<q>, neon_to_gp<q>, neon_from_gp<q>,\
mov_reg, neon_move<q>")
(set_attr "op_type" "*, *,\
reg, scalar, scalar,\
*, *")]
and then in define_insn_reservation:
--- a/gcc/config/arm/marvell-whitney.md
+++ b/gcc/config/arm/marvell-whitney.md
@@ -170,7 +170,7 @@
(const_string "wTP41")
(eq_attr "type" "neon_permute_q,neon_zip_q")
(const_string "wTP42")
(eq_attr "type" "neon_bsl")
(const_string "wTP43")
(and (eq_attr "type" "neon_logic")
(eq_attr "op_type" "imm"))
(const_string "wTP43")
(eq_attr "type" "neon_arith_acc,neon_shift_acc")
(if_then_else (match_test
The point of this is that definitions of many architectures that don't care about operand type don't need to change.
--
Maxim Kuvyrkov
www.linaro.org