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Re: [AArch64] Add special case when expanding vcond with arms {-1, -1}, {0, 0}.

On Tue, 30 Apr 2013, James Greenhalgh wrote:

If the end goal of a VEC_COND_EXPR is to pick between
{-1, -1, -1, -1} and {0, 0, 0, 0}
then we do not need to do a bit select, this is just
a move of the generated mask to the result operand.

This patch checks for this case, and emits the
appropriate instructions. This can save us loading the
two constant masks and performing a bsl.

Some other targets (x86) optimize:
(a cmp b) ? x : 0
(a cmp b) & x
and then I think they rely on the generic simplify-rtx to optimize AND with -1.

(it is also possible to replace (a cmp b) ? -1 : x with (a cmp b) | x)

Since several targets are in the same situation, it might make sense to have those optimizations in the generic code with a way for targets to advertise that their comparisons return 0/-1 the same size as the arguments (using VECTOR_STORE_FLAG_VALUE?).

(to be clear: I am not at all arguing against this patch)

Marc Glisse

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