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[Committed] Further signbit/copysign improvements (part 1/2)


This patch implements some refinements to my recent signbitl patch
suggested by Richard Henderson.  Firstly, we now specify signbit_ro
values for c4x's single and extended floating point formats (which
use a two's complement encoding rather than the more usual sign and
magnitude encoding).  And secondly, we tweak expand_copysign to use
signbit_ro when using "expand_copysign_absneg" for RTL expansion,
and signbit_rw when using "expand_copysign_bit".  The former only
requires the "read-only" signbit to determine the sign of operand 1,
but the latter attempts to invert the signbit requiring "signbit_rw".

Further changes/clean-ups to the rs6000 backend will be part 2/2.


The following patch has been tested on i686-pc-linux-gnu with a full
"make bootstrap", all default languages, and regression tested with a
top-level "make -k check" with no new failures.

Committed to mainline CVS.


2005-03-15  Roger Sayle  <roger@eyesopen.com>
	    Richard Henderson  <rth@redhat.com>

	* real.c (c4x_single_format, c4x_extended_format): Provide values
	for signbit_ro for c4x's single and extended floating point formats.
	* optabs.c (expand_copysign): Use the floating point format's
	signbit_ro for expanding via expand_copysign_absneg, and it's
	signbit_rw field for expanding via expand_copysign_bit.


Index: real.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/real.c,v
retrieving revision 1.153
diff -c -3 -p -r1.153 real.c
*** real.c	15 Mar 2005 04:23:59 -0000	1.153
--- real.c	15 Mar 2005 16:38:45 -0000
*************** const struct real_format c4x_single_form
*** 4414,4420 ****
      24,
      -126,
      128,
!     -1,
      -1,
      false,
      false,
--- 4414,4420 ----
      24,
      -126,
      128,
!     23,
      -1,
      false,
      false,
*************** const struct real_format c4x_extended_fo
*** 4433,4439 ****
      32,
      -126,
      128,
!     -1,
      -1,
      false,
      false,
--- 4433,4439 ----
      32,
      -126,
      128,
!     31,
      -1,
      false,
      false,
Index: optabs.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/optabs.c,v
retrieving revision 1.262
diff -c -3 -p -r1.262 optabs.c
*** optabs.c	15 Mar 2005 04:24:02 -0000	1.262
--- optabs.c	15 Mar 2005 16:38:47 -0000
*************** expand_copysign (rtx op0, rtx op1, rtx t
*** 2865,2871 ****
  {
    enum machine_mode mode = GET_MODE (op0);
    const struct real_format *fmt;
-   int bitpos;
    bool op0_is_abs;
    rtx temp;

--- 2865,2870 ----
*************** expand_copysign (rtx op0, rtx op1, rtx t
*** 2882,2891 ****
    if (fmt == NULL || !fmt->has_signed_zero)
      return NULL_RTX;

-   bitpos = fmt->signbit_rw;
-   if (bitpos < 0)
-     return NULL_RTX;
-
    op0_is_abs = false;
    if (GET_CODE (op0) == CONST_DOUBLE)
      {
--- 2881,2886 ----
*************** expand_copysign (rtx op0, rtx op1, rtx t
*** 2894,2910 ****
        op0_is_abs = true;
      }

!   if (GET_CODE (op0) == CONST_DOUBLE
!       || (neg_optab->handlers[mode].insn_code != CODE_FOR_nothing
!           && abs_optab->handlers[mode].insn_code != CODE_FOR_nothing))
      {
        temp = expand_copysign_absneg (mode, op0, op1, target,
! 				     bitpos, op0_is_abs);
        if (temp)
  	return temp;
      }

!   return expand_copysign_bit (mode, op0, op1, target, bitpos, op0_is_abs);
  }

  /* Generate an instruction whose insn-code is INSN_CODE,
--- 2889,2909 ----
        op0_is_abs = true;
      }

!   if (fmt->signbit_ro >= 0
!       && (GET_CODE (op0) == CONST_DOUBLE
! 	  || (neg_optab->handlers[mode].insn_code != CODE_FOR_nothing
! 	      && abs_optab->handlers[mode].insn_code != CODE_FOR_nothing)))
      {
        temp = expand_copysign_absneg (mode, op0, op1, target,
! 				     fmt->signbit_ro, op0_is_abs);
        if (temp)
  	return temp;
      }

!   if (fmt->signbit_rw < 0)
!     return NULL_RTX;
!   return expand_copysign_bit (mode, op0, op1, target,
! 			      fmt->signbit_rw, op0_is_abs);
  }

  /* Generate an instruction whose insn-code is INSN_CODE,


Roger
--


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