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Machine description for volatile memory access
- From: William Tambe <tambewilliam at gmail dot com>
- To: gcc-help <gcc-help at gcc dot gnu dot org>
- Date: Mon, 9 Sep 2019 09:48:46 -0500
- Subject: Machine description for volatile memory access
Does GCC support machine description for volatile memory accesses that
must not be cached ?
In other words, when using expressions such as theses, volatile memory
access instructions should be use:
volatile uint8_t *m;
uint8_t n;
*m = 5; // Should use a volatile memory store instruction.
n = *m; // Should use a volatile memory load instruction.
If GCC has support for the above, are there any examples I could be
pointed to in the sources ?