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[Bug target/81803] [7/8 regression] miscompilation at -O1 on mips64el
- From: "ebotcazou at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Thu, 17 Aug 2017 17:42:14 +0000
- Subject: [Bug target/81803] [7/8 regression] miscompilation at -O1 on mips64el
- Auto-submitted: auto-generated
- References: <bug-81803-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81803
--- Comment #6 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
> I have just noticed this which seems curious. Is the 39 -> 40 combine really
> a valid transformation? It seems we've lost the sign extension and we're
> just putting a 32-bit value into a 64-bit register without trying to clear
> the upper bits anymore?
Yes, for WORD_REGISTER_OPERATIONS architectures the combiner can do things like
that, although there might be bugs lurking of course.