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[Bug middle-end/51893] New: Wrong subword index computation in store_bit_field_1 on BIG_ENDIAN targets
- From: "aurelien.buhrig.gcc at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Wed, 18 Jan 2012 17:13:09 +0000
- Subject: [Bug middle-end/51893] New: Wrong subword index computation in store_bit_field_1 on BIG_ENDIAN targets
- Auto-submitted: auto-generated
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51893
Bug #: 51893
Summary: Wrong subword index computation in store_bit_field_1
on BIG_ENDIAN targets
Classification: Unclassified
Product: gcc
Version: 4.6.1
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: middle-end
AssignedTo: unassigned@gcc.gnu.org
ReportedBy: aurelien.buhrig.gcc@gmail.com
Created attachment 26369
--> http://gcc.gnu.org/bugzilla/attachment.cgi?id=26369
Patch
The subword index (wordnum) passed to operand_subword_force in
store_bit_field_1 is incorrect for BIG_ENDIAN targets when bitsize >
BITS_PER_WORD.
wordnum, which is used to get the subword of value, is
computed wrt the number of words needed by bitsize instead of the number of
words needed by the integer mode of the field, which is the mode used to
compute subwords.
For instance, for a 40bit field to be set by a DI reg (with HI words),
the offset of the LSWord of the DI reg should be 3, not 2 as currently
computed.
The attached patch seems to solve the issue. Tested on the C testsuite
without any regression (for my target only).
Note that this problem occurs on a "private" target (hardly reproducible).