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[Bug target/47556] x86: fails to take advantage of high-byte addressing mode
- From: "jeremy at goop dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Mon, 31 Jan 2011 22:17:05 +0000
- Subject: [Bug target/47556] x86: fails to take advantage of high-byte addressing mode
- Auto-submitted: auto-generated
- References: <bug-47556-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47556
--- Comment #2 from Jeremy Fitzhardinge <jeremy at goop dot org> 2011-01-31 22:16:54 UTC ---
Hm, yes, I see. The hand-written asm, which uses %ah, does appear to run into
false partial register stalls according to 3.5.2.3 in the Intel Optimisation
Reference Manual.
On the other hand, the code generated by the C version appears to be slightly
slower in measurement on a Nehalem system. Since the code in question is all
in the slow path (its the spin loop for a spinlock), perhaps the increased
icache pressure from the increased code size is more significant than the
register stalls.
Compiling with -Os rather than -O2 makes no difference.