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[Bug rtl-optimization/47270] [4.4/4.5/4.6 Regression] GCC produces unnecessary/wrong code on -O2 and -O3 levels
- From: "jakub at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Mon, 17 Jan 2011 12:06:24 +0000
- Subject: [Bug rtl-optimization/47270] [4.4/4.5/4.6 Regression] GCC produces unnecessary/wrong code on -O2 and -O3 levels
- Auto-submitted: auto-generated
- References: <bug-47270-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47270
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Priority|P3 |P4
CC| |jakub at gcc dot gnu.org
--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> 2011-01-17 12:06:11 UTC ---
Why do you think it is wrong? If %esi is non-zero upon entry, then it is just
moved to %eax and back, so it isn't changed, if it was zero upon entry, then 0
is loaded into it.
The reason for the extra code is that pre attempts to optimize it (register
vars are not SSA vars), so we get at *.optimized:
int prephitmp.4;
int r.0;
<bb 2>:
r.0_1 = r;
if (r.0_1 != 0)
goto <bb 3>;
else
goto <bb 4>;
<bb 3>:
__asm__("sar %0" : "=r" r : "0" r.0_1);
prephitmp.4_2 = r;
<bb 4>:
# prephitmp.4_8 = PHI <0(2), prephitmp.4_2(3)>
__asm__("sar %0" : "=r" r : "0" prephitmp.4_8);
and RTL optimizations aren't able to undo that. I doubt anything can be done
about this easily, with -fno-tree-pre you get your expected output.