[Bug target/11183] [3.3/3.4 regression] [arm] ICE in change_address_1 (3.3) / subreg_hard_regno (3.4)

["rearnsha at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>]

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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=11183


rearnsha@gcc.gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|                            |FIXED
   Target Milestone|3.4                         |3.3.1


------- Additional Comments From rearnsha@gcc.gnu.org  2003-06-14 16:03 -------
Ohh! Two bugs in one report...

The change_address bug was due to the fact that 1020 is a legal offset to an LDF
instruction, but 1024 is not. Thus when we break the address into parts so that
we can use LDR instructions we get an invalid offset.  Fortunately, 1024 is a
leagal offset for an LDR instruction.  Telling change_address to validate
against SImode fixes this.

The second bug is a checking failure.  When trying to find a register that
contained zero, reload had identified the fact that a floating point register
had zero in a subword of a floating point value.  However, it isn't possible to
subreg an FPA register, and the compiler was generating a consistency abort in
the checking code.  This can be rectified by defining CANNOT_CHANGE_MODE_CLASS.
 Although this failure also appears on the branch if checking is enabled, fixing
the abort does not cause different code to be output.  It seams sensible
therefore not to apply the second patch to the branch.