Re: make CFG survive post-reload splitting: SH breakage

[Jan Hubicka <jh at suse dot cz>]

> I've got a problem that I think may be related to a patch of yours.
> 
> On the SH, after we do delayed branch reorg we have a basic block that
> ends like this:
> 
> (insn 91 87 92 (sequence[ 
>             (jump_insn 85 87 83 (return) 117 {*return_i} (nil)
>                 (expr_list:REG_BR_PRED (const_int 12 [0xc])
>                     (nil)))
>             (insn 83 85 92 (set (reg:SI 8 r8)
>                     (mem:SI (post_inc:SI (reg/f:SI 15 r15)) 0)) 81 {movsi_i} (insn_list 82 (nil))
>                 (expr_list:REG_INC (reg/f:SI 15 r15)
>                     (nil)))
>         ] ) -1 (nil)
>     (nil))
> 
> split_all_insns() runs through a basic block looking for bb->end,
> which in this case is insn 85.  It never finds it because insn 85 has
> been buried inside the sequence that is insn 91.  The compiler aborts.
> 
> This didn't used to matter because split_all_insns() didn't care about
> basic block info at this point in the compilation.  Your patch changed
> all that, and now we do care about basic block information:
Does this patch looks like sensible solution?
If so, can you please test it, as I don't have any of the affected platforms

Mon Jul 23 23:18:40 CEST 2001  Jan Hubicka  <jh@suse.cz>
	* recog.c (split_all_insns_noflow): New.
	* rtl.h (split_all_insns_noflow): Declare.
	* ia64.c (ia64_reorg): Use split_all_insns_noflow.
	* m68hc11.c (m68hc11_reorg): Likewise.
	* sh.c (machine_dependent_reorg): Likewise.
Index: recog.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/recog.c,v
retrieving revision 1.115
diff -c -3 -p -r1.115 recog.c
*** recog.c	2001/07/23 14:08:11	1.115
--- recog.c	2001/07/23 21:16:07
*************** split_all_insns (upd_life)
*** 2777,2782 ****
--- 2777,2798 ----
  
    sbitmap_free (blocks);
  }
+ 
+ /* Same as split_all_insns, but do not expect CFG to be available. 
+    Used by machine depedent reorg passes.  */
+ 
+ void
+ split_all_insns_noflow ()
+ {
+   rtx next, insn;
+ 
+   for (insn = get_insns (); insn; insn = next)
+     {
+       next = NEXT_INSN (insn);
+       split_insn (insn);
+     }
+   return;
+ }
  
  #ifdef HAVE_peephole2
  struct peep2_insn_data
Index: config/ia64/ia64.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/ia64/ia64.c,v
retrieving revision 1.104
diff -c -3 -p -r1.104 ia64.c
*** ia64.c	2001/07/19 23:26:51	1.104
--- ia64.c	2001/07/23 21:16:09
*************** ia64_reorg (insns)
*** 6457,6463 ****
  {
    /* If optimizing, we'll have split before scheduling.  */
    if (optimize == 0)
!     split_all_insns (0);
  
    /* Make sure the CFG and global_live_at_start are correct
       for emit_predicate_relation_info.  */
--- 6457,6463 ----
  {
    /* If optimizing, we'll have split before scheduling.  */
    if (optimize == 0)
!     split_all_insns_noflow ();
  
    /* Make sure the CFG and global_live_at_start are correct
       for emit_predicate_relation_info.  */
Index: config/m68hc11/m68hc11.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/m68hc11/m68hc11.c,v
retrieving revision 1.18
diff -c -3 -p -r1.18 m68hc11.c
*** m68hc11.c	2001/07/20 19:34:56	1.18
--- m68hc11.c	2001/07/23 21:16:11
*************** m68hc11_reorg (first)
*** 4803,4809 ****
  
    /* Force a split of all splitable insn.  This is necessary for the
       Z register replacement mechanism because we end up with basic insns.  */
!   split_all_insns (0);
    split_done = 1;
  
    z_replacement_completed = 1;
--- 4803,4809 ----
  
    /* Force a split of all splitable insn.  This is necessary for the
       Z register replacement mechanism because we end up with basic insns.  */
!   split_all_insns_noflow ();
    split_done = 1;
  
    z_replacement_completed = 1;
*************** m68hc11_reorg (first)
*** 4850,4856 ****
       split after Z register replacement.  This gives more opportunities
       for peephole (in particular for consecutives xgdx/xgdy).  */
    if (optimize > 0)
!     split_all_insns (0);
  
    /* Once insns are split after the z_replacement_completed == 2,
       we must not re-run the life_analysis.  The xgdx/xgdy patterns
--- 4850,4856 ----
       split after Z register replacement.  This gives more opportunities
       for peephole (in particular for consecutives xgdx/xgdy).  */
    if (optimize > 0)
!     split_all_insns_noflow ();
  
    /* Once insns are split after the z_replacement_completed == 2,
       we must not re-run the life_analysis.  The xgdx/xgdy patterns
Index: config/sh/sh.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/sh/sh.c,v
retrieving revision 1.109
diff -c -3 -p -r1.109 sh.c
*** sh.c	2001/07/11 20:35:55	1.109
--- sh.c	2001/07/23 21:16:12
*************** machine_dependent_reorg (first)
*** 3023,3029 ****
       optimizing, they'll have already been split.  Otherwise, make
       sure we don't split them too late.  */
    if (! optimize)
!     split_all_insns (0);
  
    /* If relaxing, generate pseudo-ops to associate function calls with
       the symbols they call.  It does no harm to not generate these
--- 3023,3029 ----
       optimizing, they'll have already been split.  Otherwise, make
       sure we don't split them too late.  */
    if (! optimize)
!     split_all_insns_noflow ();
  
    /* If relaxing, generate pseudo-ops to associate function calls with
       the symbols they call.  It does no harm to not generate these
Index: rtl.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/rtl.h,v
retrieving revision 1.277
diff -c -3 -p -r1.277 rtl.h
*** rtl.h	2001/07/23 14:08:11	1.277
--- rtl.h	2001/07/23 21:18:14
*************** extern enum reg_class reg_alternate_clas
*** 1462,1467 ****
--- 1462,1468 ----
  extern rtx get_first_nonparm_insn	PARAMS ((void));
  
  extern void split_all_insns		PARAMS ((int));
+ extern void split_all_insns_noflow	PARAMS ((void));
  
  #define MAX_SAVED_CONST_INT 64
  extern rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];