1 # Copyright (C) 1999-2023 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
33 # "/* Assembly" for assembly code,
36 # "! Fortran" for Fortran code,
38 # "// ObjC++" for ObjC++
41 # and "(* Modula-2" for Modula-2
42 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
43 # allow for ObjC/ObjC++ specific flags.
45 proc check_compile {basename type contents args} {
47 verbose "check_compile tool: $tool for $basename"
49 # Save additional_sources to avoid compiling testsuite's sources
50 # against check_compile's source.
51 global additional_sources
52 if [info exists additional_sources] {
53 set tmp_additional_sources "$additional_sources"
54 set additional_sources ""
57 if { [llength $args] > 0 } {
58 set options [list "additional_flags=[lindex $args 0]"]
62 switch -glob -- $contents {
63 "*/\\* Assembly*" { set src ${basename}[pid].S }
64 "*! Fortran*" { set src ${basename}[pid].f90 }
65 "*// C++*" { set src ${basename}[pid].cc }
66 "*// D*" { set src ${basename}[pid].d }
67 "*// ObjC++*" { set src ${basename}[pid].mm }
68 "*/\\* ObjC*" { set src ${basename}[pid].m }
69 "*// Go*" { set src ${basename}[pid].go }
70 "*// Rust*" { set src ${basename}[pid].rs }
71 "*(\\* Modula-2*" { set src ${basename}[pid].mod }
74 "objc" { set src ${basename}[pid].m }
75 "obj-c++" { set src ${basename}[pid].mm }
76 default { set src ${basename}[pid].c }
81 set compile_type $type
83 assembly { set output ${basename}[pid].s }
84 object { set output ${basename}[pid].o }
85 executable { set output ${basename}[pid].exe }
87 set output ${basename}[pid].s
88 lappend options "additional_flags=-fdump-$type"
89 set compile_type assembly
96 set save_compiler_flags $compiler_flags
97 set lines [${tool}_target_compile $src $output $compile_type "$options"]
98 set compiler_flags $save_compiler_flags
101 set scan_output $output
102 # Don't try folding this into the switch above; calling "glob" before the
103 # file is created won't work.
104 if [regexp "rtl-(.*)" $type dummy rtl_type] {
105 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
109 # Restore additional_sources.
110 if [info exists additional_sources] {
111 set additional_sources "$tmp_additional_sources"
114 return [list $lines $scan_output]
117 proc current_target_name { } {
119 if [info exists target_info(target,name)] {
120 set answer $target_info(target,name)
127 # Implement an effective-target check for property PROP by invoking
128 # the Tcl command ARGS and seeing if it returns true.
130 proc check_cached_effective_target { prop args } {
133 set target [current_target_name]
134 if {![info exists et_cache($prop,$target)]} {
135 verbose "check_cached_effective_target $prop: checking $target" 2
136 if {[string is true -strict $args] || [string is false -strict $args]} {
137 error {check_cached_effective_target condition already evaluated; did you pass [...] instead of the expected {...}?}
139 set code [catch {uplevel eval $args} result]
140 if {$code != 0 && $code != 2} {
141 return -code $code $result
143 set et_cache($prop,$target) $result
146 set value $et_cache($prop,$target)
147 verbose "check_cached_effective_target $prop: returning $value for $target" 2
151 # Implements a version of check_cached_effective_target that also takes et_index
152 # into account when creating the key for the cache.
153 proc check_cached_effective_target_indexed { prop args } {
155 set key "$et_index $prop"
156 verbose "check_cached_effective_target_index $prop: returning $key" 2
158 return [check_cached_effective_target $key [list uplevel eval $args]]
161 # Clear effective-target cache. This is useful after testing
162 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
164 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
165 # do a clear_effective_target_cache at the end as the target cache can
166 # make decisions based upon the flags, and those decisions need to be
167 # redone when the flags change. An example of this is the
168 # asan_init/asan_finish pair.
170 proc clear_effective_target_cache { } {
175 # Like check_compile, but delete the output file and return true if the
176 # compiler printed no messages.
177 proc check_no_compiler_messages_nocache {args} {
178 set result [eval check_compile $args]
179 set lines [lindex $result 0]
180 set output [lindex $result 1]
181 remote_file build delete $output
182 return [string match "" $lines]
185 # Like check_no_compiler_messages_nocache, but cache the result.
186 # PROP is the property we're checking, and doubles as a prefix for
187 # temporary filenames.
188 proc check_no_compiler_messages {prop args} {
189 return [check_cached_effective_target $prop {
190 eval [list check_no_compiler_messages_nocache $prop] $args
194 # Like check_compile, but return true if the compiler printed no
195 # messages and if the contents of the output file satisfy PATTERN.
196 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
197 # don't match regular expression REGEXP, otherwise they satisfy it
198 # if they do match regular expression PATTERN. (PATTERN can start
199 # with something like "[!]" if the regular expression needs to match
200 # "!" as the first character.)
202 # Delete the output file before returning. The other arguments are
203 # as for check_compile.
204 proc check_no_messages_and_pattern_nocache {basename pattern args} {
207 set result [eval [list check_compile $basename] $args]
208 set lines [lindex $result 0]
209 set output [lindex $result 1]
212 if { [string match "" $lines] } {
213 set chan [open "$output"]
214 set invert [regexp {^!(.*)} $pattern dummy pattern]
215 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
219 remote_file build delete $output
223 # Like check_no_messages_and_pattern_nocache, but cache the result.
224 # PROP is the property we're checking, and doubles as a prefix for
225 # temporary filenames.
226 proc check_no_messages_and_pattern {prop pattern args} {
227 return [check_cached_effective_target $prop {
228 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
232 # Try to compile and run an executable from code CONTENTS. Return true
233 # if the compiler reports no messages and if execution "passes" in the
234 # usual DejaGNU sense. The arguments are as for check_compile, with
235 # TYPE implicitly being "executable".
236 proc check_runtime_nocache {basename contents args} {
239 set result [eval [list check_compile $basename executable $contents] $args]
240 set lines [lindex $result 0]
241 set output [lindex $result 1]
244 if { [string match "" $lines] } {
245 # No error messages, everything is OK.
246 set result [remote_load target "./$output" "" ""]
247 set status [lindex $result 0]
248 verbose "check_runtime_nocache $basename: status is <$status>" 2
249 if { $status == "pass" } {
253 remote_file build delete $output
257 # Like check_runtime_nocache, but cache the result. PROP is the
258 # property we're checking, and doubles as a prefix for temporary
260 proc check_runtime {prop args} {
263 return [check_cached_effective_target $prop {
264 eval [list check_runtime_nocache $prop] $args
268 # Return 1 if GCC was configured with $pattern.
269 proc check_configured_with { pattern } {
272 set options [list "additional_flags=-v"]
273 set gcc_output [${tool}_target_compile "" "" "none" $options]
274 if { [ regexp "Configured with: \[^\n\]*$pattern" $gcc_output ] } {
275 verbose "Matched: $pattern" 2
279 verbose "Failed to match: $pattern" 2
283 ###############################
284 # proc check_weak_available { }
285 ###############################
287 # weak symbols are only supported in some configs/object formats
288 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
290 proc check_weak_available { } {
293 # All mips targets should support it
295 if { [ string first "mips" $target_cpu ] >= 0 } {
299 # All AIX targets should support it
301 if { [istarget *-*-aix*] } {
305 # All solaris2 targets should support it
307 if { [istarget *-*-solaris2*] } {
311 # Windows targets Cygwin and MingW32 support it
313 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
317 # nvptx (nearly) supports it
319 if { [istarget nvptx-*-*] } {
323 # pdp11 doesn't support it
325 if { [istarget pdp11*-*-*] } {
329 # VxWorks hardly supports it (vx7 RTPs only)
331 if { [istarget *-*-vxworks*] } {
335 # ELF and ECOFF support it. a.out does with gas/gld but may also with
336 # other linkers, so we should try it
338 set objformat [gcc_target_object_format]
346 unknown { return -1 }
351 # return 1 if weak undefined symbols are supported.
353 proc check_effective_target_weak_undefined { } {
354 if { [istarget hppa*-*-hpux*] } {
357 return [check_runtime weak_undefined {
358 extern void foo () __attribute__((weak));
359 int main (void) { if (foo) return 1; return 0; }
363 ###############################
364 # proc check_weak_override_available { }
365 ###############################
367 # Like check_weak_available, but return 0 if weak symbol definitions
368 # cannot be overridden.
370 proc check_weak_override_available { } {
371 if { [istarget *-*-mingw*] } {
374 return [check_weak_available]
377 # Return 1 if VMA is equal to LMA for the .data section, 0
378 # otherwise. Cache the result.
380 proc check_effective_target_vma_equals_lma { } {
383 return [check_cached_effective_target vma_equals_lma {
384 set src vma_equals_lma[pid].c
385 set exe vma_equals_lma[pid].exe
386 verbose "check_effective_target_vma_equals_lma compiling testfile $src" 2
387 set f [open $src "w"]
388 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
389 puts $f "int foo = 42; void main() {}"
391 set lines [${tool}_target_compile $src $exe executable ""]
394 if [string match "" $lines] then {
397 set objdump_name [find_binutils_prog objdump]
398 set output [remote_exec host "$objdump_name" "--section-headers --section=.data $exe"]
399 set output [lindex $output 1]
401 remote_file build delete $exe
403 # Example output of objdump:
404 #vma_equals_lma9059.exe: file format elf32-littlearm
407 #Idx Name Size VMA LMA File off Algn
408 # 6 .data 00000558 20000000 08002658 00020000 2**3
409 # CONTENTS, ALLOC, LOAD, DATA
411 # Capture LMA and VMA columns for .data section
412 if ![ regexp {\d*\d+\s+\.data\s+\d+\s+(\d+)\s+(\d+)} $output dummy vma lma ] {
413 verbose "Could not parse objdump output" 2
416 return [string equal $vma $lma]
419 remote_file build delete $exe
420 verbose "Could not determine if VMA is equal to LMA. Assuming not equal." 2
426 # The "noinit" attribute is only supported by some targets.
427 # This proc returns 1 if it's supported, 0 if it's not.
429 proc check_effective_target_noinit { } {
430 if { [istarget arm*-*-eabi]
431 || [istarget msp430-*-*] } {
438 # The "persistent" attribute is only supported by some targets.
439 # This proc returns 1 if it's supported, 0 if it's not.
441 proc check_effective_target_persistent { } {
442 if { [istarget arm*-*-eabi]
443 || [istarget msp430-*-*] } {
450 ###############################
451 # proc check_visibility_available { what_kind }
452 ###############################
454 # The visibility attribute is only support in some object formats
455 # This proc returns 1 if it is supported, 0 if not.
456 # The argument is the kind of visibility, default/protected/hidden/internal.
458 proc check_visibility_available { what_kind } {
459 if [string match "" $what_kind] { set what_kind "hidden" }
461 return [check_no_compiler_messages visibility_available_$what_kind object "
462 void f() __attribute__((visibility(\"$what_kind\")));
467 ###############################
468 # proc check_alias_available { }
469 ###############################
471 # Determine if the target toolchain supports the alias attribute.
473 # Returns 2 if the target supports aliases. Returns 1 if the target
474 # only supports weak aliased. Returns 0 if the target does not
475 # support aliases at all. Returns -1 if support for aliases could not
478 proc check_alias_available { } {
481 return [check_cached_effective_target alias_available {
484 verbose "check_alias_available compiling testfile $src" 2
485 set f [open $src "w"]
486 # Compile a small test program. The definition of "g" is
487 # necessary to keep the Solaris assembler from complaining
489 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
490 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
492 set lines [${tool}_target_compile $src $obj object ""]
494 remote_file build delete $obj
496 if [string match "" $lines] then {
497 # No error messages, everything is OK.
500 if [regexp "alias definitions not supported" $lines] {
501 verbose "check_alias_available target does not support aliases" 2
503 set objformat [gcc_target_object_format]
505 if { $objformat == "elf" } {
506 verbose "check_alias_available but target uses ELF format, so it ought to" 2
512 if [regexp "only weak aliases are supported" $lines] {
513 verbose "check_alias_available target supports only weak aliases" 2
523 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
525 proc check_effective_target_alias { } {
526 if { [check_alias_available] < 2 } {
533 # Returns 1 if the target uses the ELF object format, 0 otherwise.
535 proc check_effective_target_elf { } {
536 if { [gcc_target_object_format] == "elf" } {
543 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
545 proc check_ifunc_available { } {
546 return [check_no_compiler_messages ifunc_available object {
551 typedef void F (void);
552 F* g (void) { return &f_; }
553 void f () __attribute__ ((ifunc ("g")));
560 # Returns true if --gc-sections is supported on the target.
562 proc check_gc_sections_available { } {
565 return [check_cached_effective_target gc_sections_available {
566 # Some targets don't support gc-sections despite whatever's
567 # advertised by ld's options.
568 if { [istarget alpha*-*-*]
569 || [istarget ia64-*-*] } {
573 # elf2flt uses -q (--emit-relocs), which is incompatible with
575 if { [board_info target exists ldflags]
576 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
580 # VxWorks kernel modules are relocatable objects linked with -r,
581 # while RTP executables are linked with -q (--emit-relocs).
582 # Both of these options are incompatible with --gc-sections.
583 if { [istarget *-*-vxworks*] } {
587 # Check if the ld used by gcc supports --gc-sections.
588 set options [list "additional_flags=-print-prog-name=ld"]
589 set gcc_ld [lindex [${tool}_target_compile "" "" "none" $options] 0]
590 set ld_output [remote_exec host "$gcc_ld" "--help"]
591 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
599 # Returns 1 if "dot" is supported on the host.
601 proc check_dot_available { } {
602 verbose "check_dot_available" 2
604 set status [remote_exec host "dot" "-V"]
605 verbose " status: $status" 2
606 if { [lindex $status 0] != 0 } {
612 # Return 1 if according to target_info struct and explicit target list
613 # target is supposed to support trampolines.
615 proc check_effective_target_trampolines { } {
616 if [target_info exists gcc,no_trampolines] {
619 if { [istarget avr-*-*]
620 || [istarget msp430-*-*]
621 || [istarget nvptx-*-*]
622 || [istarget pru-*-*]
623 || [istarget bpf-*-*] } {
629 # Return 1 if target has limited stack size.
631 proc check_effective_target_stack_size { } {
632 if [target_info exists gcc,stack_size] {
638 # Return the value attribute of an effective target, otherwise return 0.
640 proc dg-effective-target-value { effective_target } {
641 if { "$effective_target" == "stack_size" } {
642 if [check_effective_target_stack_size] {
643 return [target_info gcc,stack_size]
650 # Return 1 if signal.h is supported.
652 proc check_effective_target_signal { } {
653 if [target_info exists gcc,signal_suppress] {
659 # Return 1 if according to target_info struct and explicit target list
660 # target disables -fdelete-null-pointer-checks. Targets should return 0
661 # if they simply default to -fno-delete-null-pointer-checks but obey
662 # -fdelete-null-pointer-checks when passed explicitly (and tests that
663 # depend on this option should do that).
665 proc check_effective_target_keeps_null_pointer_checks { } {
666 if [target_info exists keeps_null_pointer_checks] {
669 if { [istarget msp430-*-*] } {
675 # Return the autofdo profile wrapper
677 # Linux by default allows 516KB of perf event buffers
678 # in /proc/sys/kernel/perf_event_mlock_kb
679 # Each individual perf tries to grab it
680 # This causes problems with parallel test suite runs. Instead
681 # limit us to 8 pages (32K), which should be good enough
682 # for the small test programs. With the default settings
683 # this allows parallelism of 16 and higher of parallel gcc-auto-profile
684 proc profopt-perf-wrapper { } {
686 return "$srcdir/../config/i386/gcc-auto-profile -m8 "
689 # Return true if profiling is supported on the target.
691 proc check_profiling_available { test_what } {
692 verbose "Profiling argument is <$test_what>" 1
694 # These conditions depend on the argument so examine them before
695 # looking at the cache variable.
697 # Tree profiling requires TLS runtime support.
698 if { $test_what == "-fprofile-generate" } {
699 if { ![check_effective_target_tls_runtime] } {
704 if { $test_what == "-fauto-profile" } {
705 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
706 verbose "autofdo only supported on linux"
709 # not cross compiling?
711 verbose "autofdo not supported for non native builds"
714 set event [profopt-perf-wrapper]
716 verbose "autofdo not supported"
720 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "-m8 true -v >/dev/null"]
721 if { [lindex $status 0] != 0 } {
722 verbose "autofdo not supported because perf does not work"
726 # no good way to check this in advance -- check later instead.
727 #set status [remote_exec host "create_gcov" "2>/dev/null"]
728 #if { [lindex $status 0] != 255 } {
729 # verbose "autofdo not supported due to missing create_gcov"
734 # Support for -p on solaris2 relies on mcrt1.o which comes with the
735 # vendor compiler. We cannot reliably predict the directory where the
736 # vendor compiler (and thus mcrt1.o) is installed so we can't
737 # necessarily find mcrt1.o even if we have it.
738 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
742 # We don't yet support profiling for MIPS16.
743 if { [istarget mips*-*-*]
744 && ![check_effective_target_nomips16]
745 && ($test_what == "-p" || $test_what == "-pg") } {
749 # MinGW does not support -p.
750 if { [istarget *-*-mingw*] && $test_what == "-p" } {
754 # cygwin does not support -p.
755 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
759 # uClibc does not have gcrt1.o.
760 if { [check_effective_target_uclibc]
761 && ($test_what == "-p" || $test_what == "-pg") } {
765 # Now examine the cache variable.
766 set profiling_working \
767 [check_cached_effective_target profiling_available {
768 # Some targets don't have any implementation of __bb_init_func or are
769 # missing other needed machinery.
770 if {[istarget aarch64*-*-elf]
771 || [istarget am3*-*-linux*]
772 || [istarget amdgcn-*-*]
773 || [istarget arm*-*-eabi*]
774 || [istarget arm*-*-elf]
775 || [istarget arm*-*-symbianelf*]
776 || [istarget avr-*-*]
777 || [istarget bfin-*-*]
778 || [istarget cris-*-*]
779 || [istarget csky-*-elf*]
780 || [istarget fido-*-elf]
781 || [istarget h8300-*-*]
782 || [istarget lm32-*-*]
783 || [istarget m32c-*-elf]
784 || [istarget m68k-*-elf]
785 || [istarget m68k-*-uclinux*]
786 || [istarget mips*-*-elf*]
787 || [istarget mmix-*-*]
788 || [istarget mn10300-*-elf*]
789 || [istarget moxie-*-elf*]
790 || [istarget msp430-*-*]
791 || [istarget nds32*-*-elf]
792 || [istarget nios2-*-elf]
793 || [istarget nvptx-*-*]
794 || [istarget powerpc-*-eabi*]
795 || [istarget powerpc-*-elf]
796 || [istarget pru-*-*]
798 || [istarget tic6x-*-elf]
799 || [istarget visium-*-*]
800 || [istarget xstormy16-*]
801 || [istarget xtensa*-*-elf]
802 || [istarget *-*-rtems*]
803 || [istarget *-*-vxworks*] } {
810 # -pg link test result can't be cached since it may change between
812 if { $profiling_working == 1
813 && ![check_no_compiler_messages_nocache profiling executable {
814 int main() { return 0; } } "-pg"] } {
815 set profiling_working 0
818 return $profiling_working
821 # Check to see if a target is "freestanding". This is as per the definition
822 # in Section 4 of C99 standard. Effectively, it is a target which supports no
823 # extra headers or libraries other than what is considered essential.
824 proc check_effective_target_freestanding { } {
825 if { [istarget nvptx-*-*] } {
831 # Check to see that file I/O functions are available.
832 proc check_effective_target_fileio { } {
833 return [check_no_compiler_messages fileio_available executable {
836 char *n = tmpnam (NULL);
837 FILE *f = fopen (n, "w");
844 # Return 1 if target has packed layout of structure members by
845 # default, 0 otherwise. Note that this is slightly different than
846 # whether the target has "natural alignment": both attributes may be
849 proc check_effective_target_default_packed { } {
850 return [check_no_compiler_messages default_packed assembly {
851 struct x { char a; long b; } c;
852 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
856 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
857 # documentation, where the test also comes from.
859 proc check_effective_target_pcc_bitfield_type_matters { } {
860 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
861 # bitfields, but let's stick to the example code from the docs.
862 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
863 struct foo1 { char x; char :0; char y; };
864 struct foo2 { char x; int :0; char y; };
865 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
869 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
871 proc add_options_for_tls { flags } {
872 # On AIX, __tls_get_addr/___tls_get_addr only lives in
873 # libthread, so always pass -pthread for native TLS.
874 # Need to duplicate native TLS check from
875 # check_effective_target_tls_native to avoid recursion.
876 if { ([istarget powerpc-ibm-aix*]) &&
877 [check_no_messages_and_pattern tls_native "!emutls" assembly {
879 int f (void) { return i; }
880 void g (int j) { i = j; }
882 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
887 # Return 1 if indirect jumps are supported, 0 otherwise.
889 proc check_effective_target_indirect_jumps {} {
890 if { [istarget nvptx-*-*] || [istarget bpf-*-*] } {
896 # Return 1 if nonlocal goto is supported, 0 otherwise.
898 proc check_effective_target_nonlocal_goto {} {
899 if { [istarget nvptx-*-*] || [istarget bpf-*-*] } {
905 # Return 1 if global constructors are supported, 0 otherwise.
907 proc check_effective_target_global_constructor {} {
908 if { [istarget nvptx-*-*]
909 || [istarget bpf-*-*] } {
915 # Return 1 if taking label values is supported, 0 otherwise.
917 proc check_effective_target_label_values {} {
918 if { [istarget nvptx-*-*] || [target_info exists gcc,no_label_values] } {
925 # Return 1 if builtin_return_address and builtin_frame_address are
926 # supported, 0 otherwise.
928 proc check_effective_target_return_address {} {
929 if { [istarget nvptx-*-*] } {
932 # No notion of return address in eBPF.
933 if { [istarget bpf-*-*] } {
936 # It could be supported on amdgcn, but isn't yet.
937 if { [istarget amdgcn*-*-*] } {
943 # Return 1 if the assembler does not verify function types against
944 # calls, 0 otherwise. Such verification will typically show up problems
945 # with K&R C function declarations.
947 proc check_effective_target_untyped_assembly {} {
948 if { [istarget nvptx-*-*] } {
954 # Return 1 if alloca is supported, 0 otherwise.
956 proc check_effective_target_alloca {} {
957 if { [istarget nvptx-*-*] } {
958 return [check_no_compiler_messages alloca assembly {
960 void g (int n) { f (__builtin_alloca (n)); }
966 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
968 proc check_effective_target_tls {} {
969 return [check_no_compiler_messages tls assembly {
971 int f (void) { return i; }
972 void g (int j) { i = j; }
976 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
978 proc check_effective_target_tls_native {} {
979 # VxWorks uses emulated TLS machinery, but with non-standard helper
980 # functions, so we fail to automatically detect it.
981 if { [istarget *-*-vxworks*] } {
985 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
987 int f (void) { return i; }
988 void g (int j) { i = j; }
992 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
994 proc check_effective_target_tls_emulated {} {
995 # VxWorks uses emulated TLS machinery, but with non-standard helper
996 # functions, so we fail to automatically detect it.
997 if { [istarget *-*-vxworks*] } {
1001 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
1003 int f (void) { return i; }
1004 void g (int j) { i = j; }
1008 # Return 1 if TLS executables can run correctly, 0 otherwise.
1010 proc check_effective_target_tls_runtime {} {
1011 return [check_runtime tls_runtime {
1012 __thread int thr __attribute__((tls_model("global-dynamic"))) = 0;
1013 int main (void) { return thr; }
1014 } [add_options_for_tls ""]]
1017 # Return 1 if atomic compare-and-swap is supported on 'int'
1019 proc check_effective_target_cas_char {} {
1020 return [check_no_compiler_messages cas_char assembly {
1021 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
1027 proc check_effective_target_cas_int {} {
1028 return [check_no_compiler_messages cas_int assembly {
1029 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
1031 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
1039 # Return 1 if -ffunction-sections is supported, 0 otherwise.
1041 proc check_effective_target_function_sections {} {
1042 # Darwin has its own scheme and silently accepts -ffunction-sections.
1043 if { [istarget *-*-darwin*] } {
1047 return [check_no_compiler_messages functionsections assembly {
1049 } "-ffunction-sections"]
1052 # Return 1 if instruction scheduling is available, 0 otherwise.
1054 proc check_effective_target_scheduling {} {
1055 return [check_no_compiler_messages scheduling object {
1057 } "-fschedule-insns"]
1060 # Return 1 if trapping arithmetic is available, 0 otherwise.
1062 proc check_effective_target_trapping {} {
1063 return [check_no_compiler_messages trapping object {
1064 int add (int a, int b) { return a + b; }
1068 # Return 1 if compilation with -fgraphite is error-free for trivial
1069 # code, 0 otherwise.
1071 proc check_effective_target_fgraphite {} {
1072 return [check_no_compiler_messages fgraphite object {
1077 # Return 1 if compiled with --enable-offload-targets=
1078 # This affects host compilation as ENABLE_OFFLOAD then evaluates to true.
1079 proc check_effective_target_offloading_enabled {} {
1080 return [check_configured_with "--enable-offload-targets"]
1083 # Return 1 if compilation with -fopenacc is error-free for trivial
1084 # code, 0 otherwise.
1086 proc check_effective_target_fopenacc {} {
1087 # nvptx/amdgcn can be built with the device-side bits of openacc, but it
1088 # does not make sense to test it as an openacc host.
1089 if [istarget nvptx-*-*] { return 0 }
1090 if [istarget amdgcn-*-*] { return 0 }
1092 return [check_no_compiler_messages fopenacc object {
1097 # Return 1 if compilation with -fopenmp is error-free for trivial
1098 # code, 0 otherwise.
1100 proc check_effective_target_fopenmp {} {
1101 # nvptx/amdgcn can be built with the device-side bits of libgomp, but it
1102 # does not make sense to test it as an openmp host.
1103 if [istarget nvptx-*-*] { return 0 }
1104 if [istarget amdgcn-*-*] { return 0 }
1106 return [check_no_compiler_messages fopenmp object {
1111 # Return 1 if compilation with -fgnu-tm is error-free for trivial
1112 # code, 0 otherwise.
1114 proc check_effective_target_fgnu_tm {} {
1115 return [check_no_compiler_messages fgnu_tm object {
1120 # Return 1 if the target supports mmap, 0 otherwise.
1122 proc check_effective_target_mmap {} {
1123 return [check_function_available "mmap"]
1126 # Return 1 if the target supports sysconf, 0 otherwise.
1128 proc check_effective_target_sysconf {} {
1129 return [check_function_available "sysconf"]
1132 # Return 1 if the target supports dlopen, 0 otherwise.
1133 proc check_effective_target_dlopen {} {
1134 return [check_no_compiler_messages dlopen executable {
1136 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
1137 } [add_options_for_dlopen ""]]
1140 proc add_options_for_dlopen { flags } {
1141 return "$flags -ldl"
1144 # Return 1 if the target supports clone, 0 otherwise.
1145 proc check_effective_target_clone {} {
1146 return [check_function_available "clone"]
1149 # Return 1 if the target supports setrlimit, 0 otherwise.
1150 proc check_effective_target_setrlimit {} {
1151 # Darwin has non-posix compliant RLIMIT_AS
1152 if { [istarget *-*-darwin*] } {
1155 return [check_function_available "setrlimit"]
1158 # Return 1 if the target supports gettimeofday, 0 otherwise.
1159 proc check_effective_target_gettimeofday {} {
1160 return [check_function_available "gettimeofday"]
1163 # Return 1 if the target supports swapcontext, 0 otherwise.
1164 proc check_effective_target_swapcontext {} {
1165 return [check_no_compiler_messages swapcontext executable {
1166 #include <ucontext.h>
1169 ucontext_t orig_context,child_context;
1170 if (swapcontext(&child_context, &orig_context) < 0) { }
1175 # Return 1 if the target supports POSIX threads, 0 otherwise.
1176 proc check_effective_target_pthread {} {
1177 return [check_no_compiler_messages pthread object {
1178 #include <pthread.h>
1183 # Return 1 if the target supports both Unix and internet sockets, 0 otherwise.
1184 proc check_effective_target_sockets {} {
1185 return [check_no_compiler_messages socket executable {
1186 #include <sys/socket.h>
1188 #include <netinet/in.h>
1190 socket(AF_UNIX, SOCK_STREAM, 0);
1191 socket(AF_INET, SOCK_DGRAM, 0);
1197 # Return 1 if compilation with -mpe-aligned-commons is error-free
1198 # for trivial code, 0 otherwise.
1200 proc check_effective_target_pe_aligned_commons {} {
1201 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
1202 return [check_no_compiler_messages pe_aligned_commons object {
1204 } "-mpe-aligned-commons"]
1209 # Return 1 if the target supports -static
1210 proc check_effective_target_static {} {
1211 if { [istarget arm*-*-uclinuxfdpiceabi] } {
1214 return [check_no_compiler_messages static executable {
1215 int main (void) { return 0; }
1219 # Return 1 if the target supports -fstack-protector
1220 proc check_effective_target_fstack_protector {} {
1221 if { [istarget hppa*-*-*] } {
1224 return [check_runtime fstack_protector {
1226 int main (int argc, char *argv[]) {
1228 return !strcpy (buf, strrchr (argv[0], '/'));
1230 } "-fstack-protector"]
1233 # Return 1 if the target supports -fstack-check or -fstack-check=$stack_kind
1234 proc check_stack_check_available { stack_kind } {
1235 if [string match "" $stack_kind] then {
1236 set stack_opt "-fstack-check"
1237 } else { set stack_opt "-fstack-check=$stack_kind" }
1239 return [check_no_compiler_messages stack_check_$stack_kind executable {
1240 int main (void) { return 0; }
1244 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1245 # for trivial code, 0 otherwise. As some targets (ARM for example) only
1246 # warn when -fprofile-use is also supplied we test that combination too.
1248 proc check_effective_target_freorder {} {
1249 if { [check_no_compiler_messages freorder object {
1251 } "-freorder-blocks-and-partition"]
1252 && [check_no_compiler_messages fprofile_use_freorder object {
1254 } "-fprofile-use -freorder-blocks-and-partition -Wno-missing-profile"] } {
1260 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1261 # emitted, 0 otherwise. Whether a shared library can actually be built is
1262 # out of scope for this test.
1264 proc check_effective_target_fpic { } {
1265 # Note that M68K has a multilib that supports -fpic but not
1266 # -fPIC, so we need to check both. We test with a program that
1267 # requires GOT references.
1268 foreach arg {fpic fPIC} {
1269 if [check_no_compiler_messages $arg object {
1270 extern int foo (void); extern int bar;
1271 int baz (void) { return foo () + bar; }
1279 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1280 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1281 # assumes compiler will give warning if -fpic not supported. Here we check
1282 # whether binutils supports those new -fpic relocation modifiers, and assume
1283 # -fpic is supported if there is binutils support. GCC configuration will
1284 # enable -fpic for AArch64 in this case.
1286 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1287 # memory model -fpic relocation types.
1289 proc check_effective_target_aarch64_small_fpic { } {
1290 if { [istarget aarch64*-*-*] } {
1291 return [check_no_compiler_messages aarch64_small_fpic object {
1292 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1299 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1300 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1301 # in binutils since 2015-03-04 as PR gas/17843.
1303 # This test directive make sure binutils support all features needed by TLS LE
1304 # under -mtls-size=32 on AArch64.
1306 proc check_effective_target_aarch64_tlsle32 { } {
1307 if { [istarget aarch64*-*-*] } {
1308 return [check_no_compiler_messages aarch64_tlsle32 object {
1309 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1316 # Return 1 if -shared is supported, as in no warnings or errors
1317 # emitted, 0 otherwise.
1319 proc check_effective_target_shared { } {
1320 # Note that M68K has a multilib that supports -fpic but not
1321 # -fPIC, so we need to check both. We test with a program that
1322 # requires GOT references.
1323 return [check_no_compiler_messages shared executable {
1324 extern int foo (void); extern int bar;
1325 int baz (void) { return foo () + bar; }
1329 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1331 proc check_effective_target_pie { } {
1332 if { [istarget *-*-darwin\[912\]*]
1333 || [istarget *-*-dragonfly*]
1334 || [istarget *-*-freebsd*]
1335 || [istarget *-*-linux*]
1336 || [istarget arm*-*-uclinuxfdpiceabi]
1337 || [istarget *-*-gnu*]
1338 || [istarget *-*-amdhsa]} {
1341 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1342 # Full PIE support was added in Solaris 11.3, but gcc errors out
1343 # if missing, so check for that.
1344 return [check_no_compiler_messages pie executable {
1345 int main (void) { return 0; }
1351 # Return true if the target supports -mpaired-single (as used on MIPS).
1353 proc check_effective_target_mpaired_single { args } {
1354 return [check_no_compiler_messages mpaired_single object {
1359 # Return true if the target has access to FPU instructions.
1361 proc check_effective_target_hard_float { } {
1362 if { [istarget loongarch*-*-*] } {
1363 return [check_no_compiler_messages hard_float assembly {
1364 #if (defined __loongarch_soft_float)
1365 #error __loongarch_soft_float
1370 if { [istarget mips*-*-*] } {
1371 return [check_no_compiler_messages hard_float assembly {
1372 #if (defined __mips_soft_float || defined __mips16)
1373 #error __mips_soft_float || __mips16
1378 # This proc is actually checking the availabilty of FPU
1379 # support for doubles, so on the RX we must fail if the
1380 # 64-bit double multilib has been selected.
1381 if { [istarget rx-*-*] } {
1383 # return [check_no_compiler_messages hard_float assembly {
1384 #if defined __RX_64_BIT_DOUBLES__
1385 #error __RX_64_BIT_DOUBLES__
1390 # The generic test doesn't work for C-SKY because some cores have
1391 # hard float for single precision only.
1392 if { [istarget csky*-*-*] } {
1393 return [check_no_compiler_messages hard_float assembly {
1394 #if defined __csky_soft_float__
1395 #error __csky_soft_float__
1400 # The generic test equates hard_float with "no call for adding doubles".
1401 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1402 double a (double b, double c) { return b + c; }
1406 # Return true if the target is a 64-bit MIPS target.
1408 proc check_effective_target_mips64 { } {
1409 return [check_no_compiler_messages mips64 assembly {
1416 # Return true if the target is a MIPS target that does not produce
1419 proc check_effective_target_nomips16 { } {
1420 return [check_no_compiler_messages nomips16 object {
1424 /* A cheap way of testing for -mflip-mips16. */
1425 void foo (void) { asm ("addiu $20,$20,1"); }
1426 void bar (void) { asm ("addiu $20,$20,1"); }
1431 # Add the options needed for MIPS16 function attributes. At the moment,
1432 # we don't support MIPS16 PIC.
1434 proc add_options_for_mips16_attribute { flags } {
1435 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1438 # Return true if we can force a mode that allows MIPS16 code generation.
1439 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1442 proc check_effective_target_mips16_attribute { } {
1443 return [check_no_compiler_messages mips16_attribute assembly {
1447 #if defined __mips_hard_float \
1448 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1449 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1450 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1452 } [add_options_for_mips16_attribute ""]]
1455 # Return 1 if the target supports long double larger than double when
1456 # using the new ABI, 0 otherwise.
1458 proc check_effective_target_mips_newabi_large_long_double { } {
1459 return [check_no_compiler_messages mips_newabi_large_long_double object {
1460 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1464 # Return true if the target is a MIPS target that has access
1465 # to the LL and SC instructions.
1467 proc check_effective_target_mips_llsc { } {
1468 if { ![istarget mips*-*-*] } {
1471 # Assume that these instructions are always implemented for
1472 # non-elf* targets, via emulation if necessary.
1473 if { ![istarget *-*-elf*] } {
1476 # Otherwise assume LL/SC support for everything but MIPS I.
1477 return [check_no_compiler_messages mips_llsc assembly {
1484 # Return true if the target is a MIPS target that uses in-place relocations.
1486 proc check_effective_target_mips_rel { } {
1487 if { ![istarget mips*-*-*] } {
1490 return [check_no_compiler_messages mips_rel object {
1491 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1492 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1493 #error _ABIN32 && (_ABIN32 || _ABI64)
1498 # Return true if the target is a MIPS target that uses the EABI.
1500 proc check_effective_target_mips_eabi { } {
1501 if { ![istarget mips*-*-*] } {
1504 return [check_no_compiler_messages mips_eabi object {
1511 # Return 1 if the current multilib does not generate PIC by default.
1513 proc check_effective_target_nonpic { } {
1514 return [check_no_compiler_messages nonpic assembly {
1521 # Return 1 if the current multilib generates PIE by default.
1523 proc check_effective_target_pie_enabled { } {
1524 return [check_no_compiler_messages pie_enabled assembly {
1531 # Return 1 if the target generates -fstack-protector by default.
1533 proc check_effective_target_fstack_protector_enabled {} {
1534 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1535 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1536 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1542 # Return 1 if the target does not use a status wrapper.
1544 proc check_effective_target_unwrapped { } {
1545 if { [target_info needs_status_wrapper] != "" \
1546 && [target_info needs_status_wrapper] != "0" } {
1552 # Return true if iconv is supported on the target. In particular IBM1047.
1554 proc check_iconv_available { test_what } {
1557 # If the tool configuration file has not set libiconv, try "-liconv"
1558 if { ![info exists libiconv] } {
1559 set libiconv "-liconv"
1561 set test_what [lindex $test_what 1]
1562 return [check_runtime_nocache $test_what [subst {
1568 cd = iconv_open ("$test_what", "UTF-8");
1569 if (cd == (iconv_t) -1)
1576 # Return true if the atomic library is supported on the target.
1577 proc check_effective_target_libatomic_available { } {
1578 return [check_no_compiler_messages libatomic_available executable {
1579 int main (void) { return 0; }
1583 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1585 proc check_ascii_locale_available { } {
1589 # Return true if named sections are supported on this target.
1591 proc check_named_sections_available { } {
1592 return [check_no_compiler_messages named_sections assembly {
1593 int __attribute__ ((section("whatever"))) foo;
1597 # Return true if the "naked" function attribute is supported on this target.
1599 proc check_effective_target_naked_functions { } {
1600 return [check_no_compiler_messages naked_functions assembly {
1601 void f() __attribute__((naked));
1605 # Return 1 if the target supports Fortran real kinds larger than real(8),
1608 # When the target name changes, replace the cached result.
1610 proc check_effective_target_fortran_large_real { } {
1611 return [check_no_compiler_messages fortran_large_real executable {
1613 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1620 # Return 1 if the target supports Fortran real kind real(16),
1621 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1622 # this checks for Real(16) only; the other returned real(10) if
1623 # both real(10) and real(16) are available.
1625 # When the target name changes, replace the cached result.
1627 proc check_effective_target_fortran_real_16 { } {
1628 return [check_no_compiler_messages fortran_real_16 executable {
1636 # Return 1 if the target supports Fortran real kind 10,
1637 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1638 # this checks for real(10) only.
1640 # When the target name changes, replace the cached result.
1642 proc check_effective_target_fortran_real_10 { } {
1643 return [check_no_compiler_messages fortran_real_10 executable {
1651 # Return 1 if the target supports Fortran real kind C_FLOAT128,
1652 # 0 otherwise. This differs from check_effective_target_fortran_real_16
1653 # because _Float128 has the additional requirement that it be the
1654 # 128-bit IEEE encoding; even if _Float128 is available in C, it may not
1655 # have a corresponding Fortran kind on targets (PowerPC) that use some
1656 # other encoding for long double/TFmode/real(16).
1657 proc check_effective_target_fortran_real_c_float128 { } {
1658 return [check_no_compiler_messages fortran_real_c_float128 executable {
1661 real(kind=c_float128) :: x
1667 # Return 1 if the target supports Fortran's IEEE modules,
1670 # When the target name changes, replace the cached result.
1672 proc check_effective_target_fortran_ieee { flags } {
1673 return [check_no_compiler_messages fortran_ieee executable {
1675 use, intrinsic :: ieee_features
1681 # Return 1 if the target supports SQRT for the largest floating-point
1682 # type. (Some targets lack the libm support for this FP type.)
1683 # On most targets, this check effectively checks either whether sqrtl is
1684 # available or on __float128 systems whether libquadmath is installed,
1685 # which provides sqrtq.
1687 # When the target name changes, replace the cached result.
1689 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1690 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1692 use iso_fortran_env, only: real_kinds
1693 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1694 real(kind=maxFP), volatile :: x
1702 # Return 1 if the target supports Fortran integer kinds larger than
1703 # integer(8), 0 otherwise.
1705 # When the target name changes, replace the cached result.
1707 proc check_effective_target_fortran_large_int { } {
1708 return [check_no_compiler_messages fortran_large_int executable {
1710 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1711 integer(kind=k) :: i
1716 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1718 # When the target name changes, replace the cached result.
1720 proc check_effective_target_fortran_integer_16 { } {
1721 return [check_no_compiler_messages fortran_integer_16 executable {
1728 # Return 1 if we can statically link libgfortran, 0 otherwise.
1730 # When the target name changes, replace the cached result.
1732 proc check_effective_target_static_libgfortran { } {
1733 return [check_no_compiler_messages static_libgfortran executable {
1740 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1742 proc check_effective_target_rdynamic { } {
1743 return [check_no_compiler_messages rdynamic executable {
1744 int main() { return 0; }
1748 proc check_linker_plugin_available { } {
1749 return [check_no_compiler_messages_nocache linker_plugin executable {
1750 int main() { return 0; }
1751 } "-flto -fuse-linker-plugin"]
1754 # Return 1 if the target is RV32, 0 otherwise. Cache the result.
1756 proc check_effective_target_rv32 { } {
1757 # Check that we are compiling for RV32 by checking the xlen size.
1758 return [check_no_compiler_messages riscv_rv32 assembly {
1759 #if !defined(__riscv_xlen)
1760 #error "__riscv_xlen not defined!"
1762 #if __riscv_xlen != 32
1769 # Return 1 if the target is RV64, 0 otherwise. Cache the result.
1771 proc check_effective_target_rv64 { } {
1772 # Check that we are compiling for RV64 by checking the xlen size.
1773 return [check_no_compiler_messages riscv_rv64 assembly {
1774 #if !defined(__riscv_xlen)
1775 #error "__riscv_xlen not defined!"
1777 #if __riscv_xlen != 64
1784 # Return 1 if the target OS supports running SSE executables, 0
1785 # otherwise. Cache the result.
1787 proc check_sse_os_support_available { } {
1788 return [check_cached_effective_target sse_os_support_available {
1789 # If this is not the right target then we can skip the test.
1790 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1798 # Return 1 if the target OS supports running AVX executables, 0
1799 # otherwise. Cache the result.
1801 proc check_avx_os_support_available { } {
1802 return [check_cached_effective_target avx_os_support_available {
1803 # If this is not the right target then we can skip the test.
1804 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1807 # Check that OS has AVX and SSE saving enabled.
1808 check_runtime_nocache avx_os_support_available {
1811 unsigned int eax, edx;
1813 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1814 return (eax & 0x06) != 0x06;
1821 # Return 1 if the target OS supports running AVX executables, 0
1822 # otherwise. Cache the result.
1824 proc check_avx512_os_support_available { } {
1825 return [check_cached_effective_target avx512_os_support_available {
1826 # If this is not the right target then we can skip the test.
1827 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1830 # Check that OS has AVX512, AVX and SSE saving enabled.
1831 check_runtime_nocache avx512_os_support_available {
1834 unsigned int eax, edx;
1836 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1837 return (eax & 0xe6) != 0xe6;
1844 # Return 1 if the target supports executing SSE instructions, 0
1845 # otherwise. Cache the result.
1847 proc check_sse_hw_available { } {
1848 return [check_cached_effective_target sse_hw_available {
1849 # If this is not the right target then we can skip the test.
1850 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1853 check_runtime_nocache sse_hw_available {
1857 unsigned int eax, ebx, ecx, edx;
1858 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1861 return !(edx & bit_SSE);
1868 # Return 1 if the target supports executing SSE2 instructions, 0
1869 # otherwise. Cache the result.
1871 proc check_sse2_hw_available { } {
1872 return [check_cached_effective_target sse2_hw_available {
1873 # If this is not the right target then we can skip the test.
1874 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1877 check_runtime_nocache sse2_hw_available {
1881 unsigned int eax, ebx, ecx, edx;
1882 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1885 return !(edx & bit_SSE2);
1892 # Return 1 if the target supports executing SSE4 instructions, 0
1893 # otherwise. Cache the result.
1895 proc check_sse4_hw_available { } {
1896 return [check_cached_effective_target sse4_hw_available {
1897 # If this is not the right target then we can skip the test.
1898 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1901 check_runtime_nocache sse4_hw_available {
1905 unsigned int eax, ebx, ecx, edx;
1906 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1909 return !(ecx & bit_SSE4_2);
1916 # Return 1 if the target supports executing AVX instructions, 0
1917 # otherwise. Cache the result.
1919 proc check_avx_hw_available { } {
1920 return [check_cached_effective_target avx_hw_available {
1921 # If this is not the right target then we can skip the test.
1922 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1925 check_runtime_nocache avx_hw_available {
1929 unsigned int eax, ebx, ecx, edx;
1930 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1933 return ((ecx & (bit_AVX | bit_OSXSAVE))
1934 != (bit_AVX | bit_OSXSAVE));
1941 # Return 1 if the target supports executing AVX2 instructions, 0
1942 # otherwise. Cache the result.
1944 proc check_avx2_hw_available { } {
1945 return [check_cached_effective_target avx2_hw_available {
1946 # If this is not the right target then we can skip the test.
1947 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1950 check_runtime_nocache avx2_hw_available {
1955 unsigned int eax, ebx, ecx, edx;
1957 if (__get_cpuid_max (0, NULL) < 7)
1960 __cpuid (1, eax, ebx, ecx, edx);
1962 if (!(ecx & bit_OSXSAVE))
1965 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1967 return !(ebx & bit_AVX2);
1974 # Return 1 if the target supports executing AVX512 foundation instructions, 0
1975 # otherwise. Cache the result.
1977 proc check_avx512f_hw_available { } {
1978 return [check_cached_effective_target avx512f_hw_available {
1979 # If this is not the right target then we can skip the test.
1980 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1983 check_runtime_nocache avx512f_hw_available {
1988 unsigned int eax, ebx, ecx, edx;
1990 if (__get_cpuid_max (0, NULL) < 7)
1993 __cpuid (1, eax, ebx, ecx, edx);
1995 if (!(ecx & bit_OSXSAVE))
1998 __cpuid_count (7, 0, eax, ebx, ecx, edx);
2000 return !(ebx & bit_AVX512F);
2007 # Return 1 if the target supports running SSE executables, 0 otherwise.
2009 proc check_effective_target_sse_runtime { } {
2010 if { [check_effective_target_sse]
2011 && [check_sse_hw_available]
2012 && [check_sse_os_support_available] } {
2018 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
2020 proc check_effective_target_sse2_runtime { } {
2021 if { [check_effective_target_sse2]
2022 && [check_sse2_hw_available]
2023 && [check_sse_os_support_available] } {
2029 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
2031 proc check_effective_target_sse4_runtime { } {
2032 if { [check_effective_target_sse4]
2033 && [check_sse4_hw_available]
2034 && [check_sse_os_support_available] } {
2040 # Return 1 if the target supports running AVX executables, 0 otherwise.
2042 proc check_effective_target_avx_runtime { } {
2043 if { [check_effective_target_avx]
2044 && [check_avx_hw_available]
2045 && [check_avx_os_support_available] } {
2051 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
2053 proc check_effective_target_avx2_runtime { } {
2054 if { [check_effective_target_avx2]
2055 && [check_avx2_hw_available]
2056 && [check_avx_os_support_available] } {
2062 # Return 1 if the target supports running AVX512f executables, 0 otherwise.
2064 proc check_effective_target_avx512f_runtime { } {
2065 if { [check_effective_target_avx512f]
2066 && [check_avx512f_hw_available]
2067 && [check_avx512_os_support_available] } {
2073 # Return 1 if bmi2 instructions can be compiled.
2074 proc check_effective_target_bmi2 { } {
2075 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
2078 return [check_no_compiler_messages bmi2 object {
2080 _bzhi_u32 (unsigned int __X, unsigned int __Y)
2082 return __builtin_ia32_bzhi_si (__X, __Y);
2087 # Return 1 if the target supports executing MIPS Paired-Single instructions,
2088 # 0 otherwise. Cache the result.
2090 proc check_mpaired_single_hw_available { } {
2091 return [check_cached_effective_target mpaired_single_hw_available {
2092 # If this is not the right target then we can skip the test.
2093 if { !([istarget mips*-*-*]) } {
2096 check_runtime_nocache mpaired_single_hw_available {
2099 asm volatile ("pll.ps $f2,$f4,$f6");
2107 # Return 1 if the target supports executing Loongson vector instructions,
2108 # 0 otherwise. Cache the result.
2110 proc check_mips_loongson_mmi_hw_available { } {
2111 return [check_cached_effective_target mips_loongson_mmi_hw_available {
2112 # If this is not the right target then we can skip the test.
2113 if { !([istarget mips*-*-*]) } {
2116 check_runtime_nocache mips_loongson_mmi_hw_available {
2117 #include <loongson-mmiintrin.h>
2120 asm volatile ("paddw $f2,$f4,$f6");
2128 # Return 1 if the target supports executing MIPS MSA instructions, 0
2129 # otherwise. Cache the result.
2131 proc check_mips_msa_hw_available { } {
2132 return [check_cached_effective_target mips_msa_hw_available {
2133 # If this is not the right target then we can skip the test.
2134 if { !([istarget mips*-*-*]) } {
2137 check_runtime_nocache mips_msa_hw_available {
2138 #if !defined(__mips_msa)
2139 #error "MSA NOT AVAIL"
2141 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
2142 #error "MSA NOT AVAIL FOR ISA REV < 2"
2144 #if !defined(__mips_hard_float)
2145 #error "MSA HARD_FLOAT REQUIRED"
2147 #if __mips_fpr != 64
2148 #error "MSA 64-bit FPR REQUIRED"
2154 v8i16 v = __builtin_msa_ldi_h (0);
2164 # Return 1 if the target supports running MIPS Paired-Single
2165 # executables, 0 otherwise.
2167 proc check_effective_target_mpaired_single_runtime { } {
2168 if { [check_effective_target_mpaired_single "-mpaired-single"]
2169 && [check_mpaired_single_hw_available] } {
2175 # Return 1 if the target supports running Loongson executables, 0 otherwise.
2177 proc check_effective_target_mips_loongson_mmi_runtime { } {
2178 if { [check_effective_target_mips_loongson_mmi "-mloongson-mmi"]
2179 && [check_mips_loongson_mmi_hw_available] } {
2185 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
2187 proc check_effective_target_mips_msa_runtime { } {
2188 if { [check_effective_target_mips_msa "-mmsa"]
2189 && [check_mips_msa_hw_available] } {
2195 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
2196 # move instructions for moves from GPR to FPR.
2198 proc check_effective_target_powerpc64_no_dm { } {
2199 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
2200 # checks if we do not use direct moves, but use the old-fashioned
2201 # slower move-via-the-stack.
2202 return [check_no_messages_and_pattern powerpc64_no_dm \
2203 {\mmulld\M.*\mlfd} assembly {
2204 double f(long long x) { return x*x; }
2208 # Return 1 if the target supports the __builtin_cpu_supports built-in,
2209 # including having a new enough library to support the test. Cache the result.
2210 # Require at least a power7 to run on.
2212 proc check_ppc_cpu_supports_hw_available { } {
2213 return [check_cached_effective_target ppc_cpu_supports_hw_available {
2214 # Some simulators are known to not support VSX/power8 instructions.
2215 # For now, disable on Darwin
2216 if { [istarget powerpc-*-eabi]
2217 || [istarget powerpc*-*-eabispe]
2218 || [istarget *-*-darwin*]} {
2222 check_runtime_nocache ppc_cpu_supports_hw_available {
2226 asm volatile ("xxlor vs0,vs0,vs0");
2228 asm volatile ("xxlor 0,0,0");
2230 if (!__builtin_cpu_supports ("vsx"))
2239 # Return 1 if the target supports executing 750CL paired-single instructions, 0
2240 # otherwise. Cache the result.
2242 proc check_750cl_hw_available { } {
2243 return [check_cached_effective_target 750cl_hw_available {
2244 # If this is not the right target then we can skip the test.
2245 if { ![istarget powerpc-*paired*] } {
2248 check_runtime_nocache 750cl_hw_available {
2252 asm volatile ("ps_mul v0,v0,v0");
2254 asm volatile ("ps_mul 0,0,0");
2263 # Return 1 if the target supports executing power8 vector instructions, 0
2264 # otherwise. Cache the result.
2266 proc check_p8vector_hw_available { } {
2267 return [check_cached_effective_target p8vector_hw_available {
2268 # Some simulators are known to not support VSX/power8 instructions.
2269 # For now, disable on Darwin
2270 if { [istarget powerpc-*-eabi]
2271 || [istarget powerpc*-*-eabispe]
2272 || [istarget *-*-darwin*]} {
2275 set options "-mpower8-vector"
2276 check_runtime_nocache p8vector_hw_available {
2280 asm volatile ("xxlorc vs0,vs0,vs0");
2282 asm volatile ("xxlorc 0,0,0");
2291 # Return 1 if the target supports executing power9 vector instructions, 0
2292 # otherwise. Cache the result.
2294 proc check_p9vector_hw_available { } {
2295 return [check_cached_effective_target p9vector_hw_available {
2296 # Some simulators are known to not support VSX/power8/power9
2297 # instructions. For now, disable on Darwin.
2298 if { [istarget powerpc-*-eabi]
2299 || [istarget powerpc*-*-eabispe]
2300 || [istarget *-*-darwin*]} {
2303 set options "-mpower9-vector"
2304 check_runtime_nocache p9vector_hw_available {
2308 vector double v = (vector double) { 0.0, 0.0 };
2309 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2317 # Return 1 if the PowerPC target generates PC-relative instructions
2318 # automatically for targets that support PC-relative instructions.
2319 proc check_effective_target_powerpc_pcrel { } {
2320 return [check_no_messages_and_pattern powerpc_pcrel \
2321 {\mpla\M} assembly {
2322 static unsigned short s;
2323 unsigned short *p_foo (void) { return &s; }
2324 } {-O2 -mcpu=power10}]
2327 # Return 1 if the PowerPC target generates prefixed instructions automatically
2328 # for targets that support prefixed instructions.
2329 proc check_effective_target_powerpc_prefixed_addr { } {
2330 return [check_no_messages_and_pattern powerpc_prefixed_addr \
2331 {\mplwz\M} assembly {
2332 unsigned int foo (unsigned int *p) { return p[0x12345]; }
2333 } {-O2 -mcpu=power10}]
2336 # Return 1 if the target supports executing power9 modulo instructions, 0
2337 # otherwise. Cache the result.
2339 proc check_p9modulo_hw_available { } {
2340 return [check_cached_effective_target p9modulo_hw_available {
2341 # Some simulators are known to not support VSX/power8/power9
2342 # instructions. For now, disable on Darwin.
2343 if { [istarget powerpc-*-eabi]
2344 || [istarget powerpc*-*-eabispe]
2345 || [istarget *-*-darwin*]} {
2348 set options "-mmodulo"
2349 check_runtime_nocache p9modulo_hw_available {
2352 int i = 5, j = 3, r = -1;
2353 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2362 # Return 1 if the target supports executing power10 instructions, 0 otherwise.
2363 # Cache the result. It is assumed that if a simulator does not support the
2364 # power10 instructions, that it will generate an error and this test will fail.
2366 proc check_power10_hw_available { } {
2367 return [check_cached_effective_target power10_hw_available {
2368 check_runtime_nocache power10_hw_available {
2371 /* Set e first and use +r to check if pli actually works. */
2373 asm ("pli %0,%1" : "+r" (e) : "n" (0x12345));
2382 # Return 1 if the target supports executing MMA instructions, 0 otherwise.
2383 # Cache the result. It is assumed that if a simulator does not support the
2384 # MMA instructions, that it will generate an error and this test will fail.
2386 proc check_ppc_mma_hw_available { } {
2387 return [check_cached_effective_target ppc_mma_hw_available {
2388 check_runtime_nocache ppc_mma_hw_available {
2389 #include <altivec.h>
2390 typedef double v4sf_t __attribute__ ((vector_size (16)));
2397 __builtin_mma_xxsetaccz (&acc0);
2398 __builtin_mma_disassemble_acc (result, &acc0);
2399 if (result[0][0] != 0.0)
2407 # Return 1 if the target supports executing __float128 on PowerPC via software
2408 # emulation, 0 otherwise. Cache the result.
2410 proc check_ppc_float128_sw_available { } {
2411 return [check_cached_effective_target ppc_float128_sw_available {
2412 # Some simulators are known to not support VSX/power8/power9
2413 # instructions. For now, disable on Darwin and VxWorks.
2414 if { [istarget *-*-vxworks*]
2415 || [istarget powerpc-*-eabi]
2416 || [istarget powerpc*-*-eabispe]
2417 || [istarget *-*-darwin*]} {
2420 set options "-mfloat128 -mvsx"
2421 check_runtime_nocache ppc_float128_sw_available {
2422 volatile __float128 x = 1.0q;
2423 volatile __float128 y = 2.0q;
2426 __float128 z = x + y;
2434 # Return 1 if the target supports executing __float128 on PowerPC via power9
2435 # hardware instructions, 0 otherwise. Cache the result.
2437 proc check_ppc_float128_hw_available { } {
2438 return [check_cached_effective_target ppc_float128_hw_available {
2439 # Some simulators are known to not support VSX/power8/power9
2440 # instructions. For now, disable on Darwin.
2441 if { [istarget *-*-vxworks*]
2442 || [istarget powerpc-*-eabi]
2443 || [istarget powerpc*-*-eabispe]
2444 || [istarget *-*-darwin*]} {
2447 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2448 check_runtime_nocache ppc_float128_hw_available {
2449 volatile __float128 x = 1.0q;
2450 volatile __float128 y = 2.0q;
2453 __float128 z = x + y;
2454 __float128 w = -1.0q;
2456 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2457 return ((z != 3.0q) || (z != w));
2464 # See if the __ieee128 keyword is understood.
2465 proc check_effective_target_ppc_ieee128_ok { } {
2466 return [check_cached_effective_target ppc_ieee128_ok {
2467 # disable on AIX and VxWorks.
2468 if { [istarget *-*-aix*]
2469 || [istarget *-*-vxworks*]} {
2472 set options "-mfloat128"
2473 check_runtime_nocache ppc_ieee128_ok {
2484 # Check if GCC and GLIBC supports explicitly specifying that the long double
2485 # format uses the IBM 128-bit extended double format. Under little endian
2486 # PowerPC Linux, you need GLIBC 2.32 or later to be able to use a different
2487 # long double format for running a program than the system default.
2489 proc check_effective_target_long_double_ibm128 { } {
2490 return [check_runtime_nocache long_double_ibm128 {
2493 /* use volatile to prevent optimization. */
2494 volatile __ibm128 a = (__ibm128) 3.0;
2495 volatile long double one = 1.0L;
2496 volatile long double two = 2.0L;
2497 volatile long double b;
2503 if (sizeof (long double) != 16)
2506 /* eliminate removing volatile cast warning. */
2509 if (memcmp (&a2, &b2, 16) != 0)
2511 sprintf (buffer, "%lg", b);
2512 return strcmp (buffer, "3") != 0;
2514 } [add_options_for_long_double_ibm128 ""]]
2517 # Return the appropriate options to specify that long double uses the IBM
2518 # 128-bit format on PowerPC.
2520 proc add_options_for_long_double_ibm128 { flags } {
2521 if { [istarget powerpc*-*-*] } {
2522 return "$flags -mlong-double-128 -Wno-psabi -mabi=ibmlongdouble"
2527 # Check if GCC and GLIBC supports explicitly specifying that the long double
2528 # format uses the IEEE 128-bit format. Under little endian PowerPC Linux, you
2529 # need GLIBC 2.32 or later to be able to use a different long double format for
2530 # running a program than the system default.
2532 proc check_effective_target_long_double_ieee128 { } {
2533 return [check_runtime_nocache long_double_ieee128 {
2536 /* use volatile to prevent optimization. */
2537 volatile _Float128 a = 3.0f128;
2538 volatile long double one = 1.0L;
2539 volatile long double two = 2.0L;
2540 volatile long double b;
2546 if (sizeof (long double) != 16)
2549 /* eliminate removing volatile cast warning. */
2552 if (memcmp (&a2, &b2, 16) != 0)
2554 sprintf (buffer, "%lg", b);
2555 return strcmp (buffer, "3") != 0;
2557 } [add_options_for_long_double_ieee128 ""]]
2560 # Return the appropriate options to specify that long double uses the IBM
2561 # 128-bit format on PowerPC.
2562 proc add_options_for_long_double_ieee128 { flags } {
2563 if { [istarget powerpc*-*-*] } {
2564 return "$flags -mlong-double-128 -Wno-psabi -mabi=ieeelongdouble"
2569 # Check if GCC and GLIBC supports explicitly specifying that the long double
2570 # format uses the IEEE 64-bit. Under little endian PowerPC Linux, you need
2571 # GLIBC 2.32 or later to be able to use a different long double format for
2572 # running a program than the system default.
2574 proc check_effective_target_long_double_64bit { } {
2575 return [check_runtime_nocache long_double_64bit {
2578 /* use volatile to prevent optimization. */
2579 volatile double a = 3.0;
2580 volatile long double one = 1.0L;
2581 volatile long double two = 2.0L;
2582 volatile long double b;
2588 if (sizeof (long double) != 8)
2591 /* eliminate removing volatile cast warning. */
2594 if (memcmp (&a2, &b2, 16) != 0)
2596 sprintf (buffer, "%lg", b);
2597 return strcmp (buffer, "3") != 0;
2599 } [add_options_for_ppc_long_double_override_64bit ""]]
2602 # Return the appropriate options to specify that long double uses the IEEE
2603 # 64-bit format on PowerPC.
2605 proc add_options_for_long_double_64bit { flags } {
2606 if { [istarget powerpc*-*-*] } {
2607 return "$flags -mlong-double-64"
2612 # Return 1 if the target supports executing VSX instructions, 0
2613 # otherwise. Cache the result.
2615 proc check_vsx_hw_available { } {
2616 return [check_cached_effective_target vsx_hw_available {
2617 # Some simulators are known to not support VSX instructions.
2618 # For now, disable on Darwin
2619 if { [istarget powerpc-*-eabi]
2620 || [istarget powerpc*-*-eabispe]
2621 || [istarget *-*-darwin*]} {
2625 check_runtime_nocache vsx_hw_available {
2629 asm volatile ("xxlor vs0,vs0,vs0");
2631 asm volatile ("xxlor 0,0,0");
2640 # Return 1 if the target supports executing AltiVec instructions, 0
2641 # otherwise. Cache the result.
2643 proc check_vmx_hw_available { } {
2644 return [check_cached_effective_target vmx_hw_available {
2645 # Some simulators are known to not support VMX instructions.
2646 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2649 # Most targets don't require special flags for this test case, but
2650 # Darwin does. Just to be sure, make sure VSX is not enabled for
2651 # the altivec tests.
2652 if { [istarget *-*-darwin*]
2653 || [istarget *-*-aix*] } {
2654 set options "-maltivec -mno-vsx"
2656 set options "-mno-vsx"
2658 check_runtime_nocache vmx_hw_available {
2662 asm volatile ("vor v0,v0,v0");
2664 asm volatile ("vor 0,0,0");
2673 proc check_ppc_recip_hw_available { } {
2674 return [check_cached_effective_target ppc_recip_hw_available {
2675 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2676 # For now, disable on Darwin
2677 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2680 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2681 check_runtime_nocache ppc_recip_hw_available {
2682 volatile double d_recip, d_rsqrt, d_four = 4.0;
2683 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2686 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2687 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2688 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2689 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2697 # Return 1 if the target supports executing AltiVec and Cell PPU
2698 # instructions, 0 otherwise. Cache the result.
2700 proc check_effective_target_cell_hw { } {
2701 return [check_cached_effective_target cell_hw_available {
2702 # Some simulators are known to not support VMX and PPU instructions.
2703 if { [istarget powerpc-*-eabi*] } {
2706 # Most targets don't require special flags for this test
2707 # case, but Darwin and AIX do.
2708 if { [istarget *-*-darwin*]
2709 || [istarget *-*-aix*] } {
2710 set options "-maltivec -mcpu=cell"
2712 set options "-mcpu=cell"
2714 check_runtime_nocache cell_hw_available {
2718 asm volatile ("vor v0,v0,v0");
2719 asm volatile ("lvlx v0,r0,r0");
2721 asm volatile ("vor 0,0,0");
2722 asm volatile ("lvlx 0,0,0");
2731 # Return 1 if the target supports executing 64-bit instructions, 0
2732 # otherwise. Cache the result.
2734 proc check_effective_target_powerpc64 { } {
2735 global powerpc64_available_saved
2738 if [info exists powerpc64_available_saved] {
2739 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2741 set powerpc64_available_saved 0
2743 # Some simulators are known to not support powerpc64 instructions.
2744 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2745 verbose "check_effective_target_powerpc64 returning 0" 2
2746 return $powerpc64_available_saved
2749 # Set up, compile, and execute a test program containing a 64-bit
2750 # instruction. Include the current process ID in the file
2751 # names to prevent conflicts with invocations for multiple
2756 set f [open $src "w"]
2757 puts $f "int main() {"
2758 puts $f "#ifdef __MACH__"
2759 puts $f " asm volatile (\"extsw r0,r0\");"
2761 puts $f " asm volatile (\"extsw 0,0\");"
2763 puts $f " return 0; }"
2766 set opts "additional_flags=-mcpu=G5"
2768 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2769 set lines [${tool}_target_compile $src $exe executable "$opts"]
2772 if [string match "" $lines] then {
2773 # No error message, compilation succeeded.
2774 set result [${tool}_load "./$exe" "" ""]
2775 set status [lindex $result 0]
2776 remote_file build delete $exe
2777 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2779 if { $status == "pass" } then {
2780 set powerpc64_available_saved 1
2783 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2787 return $powerpc64_available_saved
2790 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2791 # complex float arguments. This affects gfortran tests that call cabsf
2792 # in libm built by an earlier compiler. Return 0 if libm uses the same
2793 # argument passing as the compiler under test, 1 otherwise.
2795 proc check_effective_target_broken_cplxf_arg { } {
2796 # Skip the work for targets known not to be affected.
2797 if { ![istarget powerpc*-*-linux*] || ![is-effective-target lp64] } {
2801 return [check_cached_effective_target broken_cplxf_arg {
2802 check_runtime_nocache broken_cplxf_arg {
2803 #include <complex.h>
2804 extern void abort (void);
2805 float fabsf (float);
2806 float cabsf (_Complex float);
2813 if (fabsf (f - 5.0) > 0.0001)
2814 /* Yes, it's broken. */
2816 /* All fine, not broken. */
2823 # Return 1 is this is a TI C6X target supporting C67X instructions
2824 proc check_effective_target_ti_c67x { } {
2825 return [check_no_compiler_messages ti_c67x assembly {
2826 #if !defined(_TMS320C6700)
2827 #error !_TMS320C6700
2832 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2833 proc check_effective_target_ti_c64xp { } {
2834 return [check_no_compiler_messages ti_c64xp assembly {
2835 #if !defined(_TMS320C6400_PLUS)
2836 #error !_TMS320C6400_PLUS
2841 # Check if a -march=... option is given, as part of (earlier) options.
2842 proc check_effective_target_march_option { } {
2843 return [check-flags [list "" { *-*-* } { "-march=*" } { "" } ]]
2846 proc check_alpha_max_hw_available { } {
2847 return [check_runtime alpha_max_hw_available {
2848 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2852 # Returns true iff the FUNCTION is available on the target system.
2853 # (This is essentially a Tcl implementation of Autoconf's
2856 proc check_function_available { function } {
2857 return [check_no_compiler_messages ${function}_available \
2863 int main () { $function (); }
2867 # Returns true iff "fork" is available on the target system.
2869 proc check_fork_available {} {
2870 if { [istarget *-*-vxworks*] } {
2871 # VxWorks doesn't have fork but our way to test can't
2872 # tell as we're doing partial links for kernel modules.
2875 return [check_function_available "fork"]
2878 # Returns true iff "mkfifo" is available on the target system.
2880 proc check_mkfifo_available {} {
2881 if { [istarget *-*-cygwin*] } {
2882 # Cygwin has mkfifo, but support is incomplete.
2886 return [check_function_available "mkfifo"]
2889 # Returns true iff "__cxa_atexit" is used on the target system.
2891 proc check_cxa_atexit_available { } {
2892 return [check_cached_effective_target cxa_atexit_available {
2893 if { [istarget *-*-vxworks] } {
2894 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2897 check_runtime_nocache cxa_atexit_available {
2900 static unsigned int count;
2917 Y() { f(); count = 2; }
2926 int main() { return 0; }
2932 proc check_effective_target_objc2 { } {
2933 return [check_no_compiler_messages objc2 object {
2942 proc check_effective_target_next_runtime { } {
2943 return [check_no_compiler_messages objc2 object {
2944 #ifdef __NEXT_RUNTIME__
2947 #error !__NEXT_RUNTIME__
2952 # Return 1 if we're generating code for big-endian memory order.
2954 proc check_effective_target_be { } {
2955 return [check_no_compiler_messages be object {
2956 int dummy[__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ? 1 : -1];
2960 # Return 1 if we're generating code for little-endian memory order.
2962 proc check_effective_target_le { } {
2963 return [check_no_compiler_messages le object {
2964 int dummy[__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ ? 1 : -1];
2968 # Return 1 if we can link a program with 2+GB of data.
2970 proc check_effective_target_two_plus_gigs { } {
2971 return [check_no_compiler_messages two_plus_gigs executable {
2972 char dummy[0x80000000];
2973 int main () { return 0; }
2977 # Return 1 if we're generating 32-bit code using default options, 0
2980 proc check_effective_target_ilp32 { } {
2981 return [check_no_compiler_messages ilp32 object {
2982 int dummy[sizeof (int) == 4
2983 && sizeof (void *) == 4
2984 && sizeof (long) == 4 ? 1 : -1];
2988 # Return 1 if we're generating ia32 code using default options, 0
2991 proc check_effective_target_ia32 { } {
2992 return [check_no_compiler_messages ia32 object {
2993 int dummy[sizeof (int) == 4
2994 && sizeof (void *) == 4
2995 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2999 # Return 1 if we're generating x32 code using default options, 0
3002 proc check_effective_target_x32 { } {
3003 return [check_no_compiler_messages x32 object {
3004 int dummy[sizeof (int) == 4
3005 && sizeof (void *) == 4
3006 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
3010 # Return 1 if we're generating 32-bit integers using default
3011 # options, 0 otherwise.
3013 proc check_effective_target_int32 { } {
3014 return [check_no_compiler_messages int32 object {
3015 int dummy[sizeof (int) == 4 ? 1 : -1];
3019 # Return 1 if we're generating 32-bit or larger integers using default
3020 # options, 0 otherwise.
3022 proc check_effective_target_int32plus { } {
3023 return [check_no_compiler_messages int32plus object {
3024 int dummy[sizeof (int) >= 4 ? 1 : -1];
3028 # Return 1 if we're generating 64-bit long long using default options,
3031 proc check_effective_target_longlong64 { } {
3032 return [check_no_compiler_messages longlong64 object {
3033 int dummy[sizeof (long long) == 8 ? 1 : -1];
3037 # Return 1 if we're generating 32-bit or larger pointers using default
3038 # options, 0 otherwise.
3040 proc check_effective_target_ptr32plus { } {
3041 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
3042 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
3043 # cannot really hold a 32-bit address, so we always return false here.
3044 if { [istarget msp430-*-*] } {
3048 return [check_no_compiler_messages ptr32plus object {
3049 int dummy[sizeof (void *) >= 4 ? 1 : -1];
3053 # Return 1 if we support 16-bit or larger array and structure sizes
3054 # using default options, 0 otherwise.
3055 # This implies at least a 20-bit address space, as no targets have an address
3056 # space between 16 and 20 bits.
3058 proc check_effective_target_size20plus { } {
3059 return [check_no_compiler_messages size20plus object {
3064 # Return 1 if target supports function pointers, 0 otherwise.
3066 proc check_effective_target_function_pointers { } {
3067 if { [istarget pru-*-*] } {
3068 return [check_no_compiler_messages func_ptr_avail assembly {
3069 #ifdef __PRU_EABI_GNU__
3077 # Return 1 if target supports arbitrarily large return values, 0 otherwise.
3079 proc check_effective_target_large_return_values { } {
3080 if { [istarget pru-*-*] } {
3081 return [check_no_compiler_messages large_return_values assembly {
3082 #ifdef __PRU_EABI_GNU__
3089 # Return 1 if we support 20-bit or larger array and structure sizes
3090 # using default options, 0 otherwise.
3091 # This implies at least a 24-bit address space, as no targets have an address
3092 # space between 20 and 24 bits.
3094 proc check_effective_target_size24plus { } {
3095 return [check_no_compiler_messages size24plus object {
3096 char dummy[524289L];
3100 # Return 1 if we support 24-bit or larger array and structure sizes
3101 # using default options, 0 otherwise.
3102 # This implies at least a 32-bit address space, as no targets have an address
3103 # space between 24 and 32 bits.
3105 proc check_effective_target_size32plus { } {
3106 return [check_no_compiler_messages size32plus object {
3107 char dummy[16777217L];
3111 # Returns 1 if we're generating 16-bit or smaller integers with the
3112 # default options, 0 otherwise.
3114 proc check_effective_target_int16 { } {
3115 return [check_no_compiler_messages int16 object {
3116 int dummy[sizeof (int) < 4 ? 1 : -1];
3120 # Return 1 if we're generating 64-bit code using default options, 0
3123 proc check_effective_target_lp64 { } {
3124 return [check_no_compiler_messages lp64 object {
3125 int dummy[sizeof (int) == 4
3126 && sizeof (void *) == 8
3127 && sizeof (long) == 8 ? 1 : -1];
3131 # Return 1 if we're generating 64-bit code using default llp64 options,
3134 proc check_effective_target_llp64 { } {
3135 return [check_no_compiler_messages llp64 object {
3136 int dummy[sizeof (int) == 4
3137 && sizeof (void *) == 8
3138 && sizeof (long long) == 8
3139 && sizeof (long) == 4 ? 1 : -1];
3143 # Return 1 if long and int have different sizes,
3146 proc check_effective_target_long_neq_int { } {
3147 return [check_no_compiler_messages long_ne_int object {
3148 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
3152 # Return 1 if int size is equal to float size,
3155 proc check_effective_target_int_eq_float { } {
3156 return [check_no_compiler_messages int_eq_float object {
3157 int dummy[sizeof (int) >= sizeof (float) ? 1 : -1];
3161 # Return 1 if short size is equal to int size,
3164 proc check_effective_target_short_eq_int { } {
3165 return [check_no_compiler_messages short_eq_int object {
3166 int dummy[sizeof (short) == sizeof (int) ? 1 : -1];
3170 # Return 1 if pointer size is equal to short size,
3173 proc check_effective_target_ptr_eq_short { } {
3174 return [check_no_compiler_messages ptr_eq_short object {
3175 int dummy[sizeof (void *) == sizeof (short) ? 1 : -1];
3179 # Return 1 if pointer size is equal to long size,
3182 proc check_effective_target_ptr_eq_long { } {
3183 # sizeof (void *) == 4 for msp430-elf -mlarge which is equal to
3184 # sizeof (long). Avoid false positive.
3185 if { [istarget msp430-*-*] } {
3188 return [check_no_compiler_messages ptr_eq_long object {
3189 int dummy[sizeof (void *) == sizeof (long) ? 1 : -1];
3193 # Return 1 if the target supports long double larger than double,
3196 proc check_effective_target_large_long_double { } {
3197 return [check_no_compiler_messages large_long_double object {
3198 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
3202 # Return 1 if the target supports double larger than float,
3205 proc check_effective_target_large_double { } {
3206 return [check_no_compiler_messages large_double object {
3207 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
3211 # Return 1 if the target supports long double of 128 bits,
3214 proc check_effective_target_longdouble128 { } {
3215 return [check_no_compiler_messages longdouble128 object {
3216 int dummy[sizeof(long double) == 16 ? 1 : -1];
3220 # Return 1 if the target supports long double of 64 bits,
3223 proc check_effective_target_longdouble64 { } {
3224 return [check_no_compiler_messages longdouble64 object {
3225 int dummy[sizeof(long double) == 8 ? 1 : -1];
3229 # Return 1 if the target supports double of 64 bits,
3232 proc check_effective_target_double64 { } {
3233 return [check_no_compiler_messages double64 object {
3234 int dummy[sizeof(double) == 8 ? 1 : -1];
3238 # Return 1 if the target supports double of at least 64 bits,
3241 proc check_effective_target_double64plus { } {
3242 return [check_no_compiler_messages double64plus object {
3243 int dummy[sizeof(double) >= 8 ? 1 : -1];
3247 # Return 1 if the target supports 'w' suffix on floating constant
3250 proc check_effective_target_has_w_floating_suffix { } {
3252 if [check_effective_target_c++] {
3253 append opts "-std=gnu++03"
3255 return [check_no_compiler_messages w_fp_suffix object {
3260 # Return 1 if the target supports 'q' suffix on floating constant
3263 proc check_effective_target_has_q_floating_suffix { } {
3265 if [check_effective_target_c++] {
3266 append opts "-std=gnu++03"
3268 return [check_no_compiler_messages q_fp_suffix object {
3273 # Return 1 if the target supports the _FloatN / _FloatNx type
3274 # indicated in the function name, 0 otherwise.
3276 proc check_effective_target_float16 {} {
3277 return [check_no_compiler_messages_nocache float16 object {
3278 _Float16 foo (_Float16 x) { return x; }
3279 } [add_options_for_float16 ""]]
3282 proc check_effective_target_float32 {} {
3283 return [check_no_compiler_messages_nocache float32 object {
3285 } [add_options_for_float32 ""]]
3288 proc check_effective_target_float64 {} {
3289 return [check_no_compiler_messages_nocache float64 object {
3291 } [add_options_for_float64 ""]]
3294 proc check_effective_target_float128 {} {
3295 return [check_no_compiler_messages_nocache float128 object {
3297 } [add_options_for_float128 ""]]
3300 proc check_effective_target_float32x {} {
3301 return [check_no_compiler_messages_nocache float32x object {
3303 } [add_options_for_float32x ""]]
3306 proc check_effective_target_float64x {} {
3307 return [check_no_compiler_messages_nocache float64x object {
3309 } [add_options_for_float64x ""]]
3312 proc check_effective_target_float128x {} {
3313 return [check_no_compiler_messages_nocache float128x object {
3315 } [add_options_for_float128x ""]]
3318 # Likewise, but runtime support for any special options used as well
3319 # as compile-time support is required.
3321 proc check_effective_target_float16_runtime {} {
3322 return [check_effective_target_float16]
3325 proc check_effective_target_float32_runtime {} {
3326 return [check_effective_target_float32]
3329 proc check_effective_target_float64_runtime {} {
3330 return [check_effective_target_float64]
3333 proc check_effective_target_float128_runtime {} {
3334 if { ![check_effective_target_float128] } {
3337 if { [istarget powerpc*-*-*] } {
3338 return [check_effective_target_base_quadfloat_support]
3343 proc check_effective_target_float32x_runtime {} {
3344 return [check_effective_target_float32x]
3347 proc check_effective_target_float64x_runtime {} {
3348 if { ![check_effective_target_float64x] } {
3351 if { [istarget powerpc*-*-*] } {
3352 return [check_effective_target_base_quadfloat_support]
3357 proc check_effective_target_float128x_runtime {} {
3358 return [check_effective_target_float128x]
3361 # Return 1 if the target hardware supports any options added for
3362 # _FloatN and _FloatNx types, 0 otherwise.
3364 proc check_effective_target_floatn_nx_runtime {} {
3365 if { [istarget powerpc*-*-aix*] } {
3368 if { [istarget powerpc*-*-*] } {
3369 return [check_effective_target_base_quadfloat_support]
3374 # Add options needed to use the _FloatN / _FloatNx type indicated in
3375 # the function name.
3377 proc add_options_for_float16 { flags } {
3378 if { [istarget arm*-*-*] } {
3379 return "$flags -mfp16-format=ieee"
3384 proc add_options_for_float32 { flags } {
3388 proc add_options_for_float64 { flags } {
3392 proc add_options_for_float128 { flags } {
3393 return [add_options_for___float128 "$flags"]
3396 proc add_options_for_float32x { flags } {
3400 proc add_options_for_float64x { flags } {
3401 return [add_options_for___float128 "$flags"]
3404 proc add_options_for_float128x { flags } {
3408 # Return 1 if the target supports __float128,
3411 proc check_effective_target___float128 { } {
3412 if { [istarget powerpc*-*-*] } {
3413 return [check_ppc_float128_sw_available]
3415 if { [istarget ia64-*-*]
3416 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
3422 proc add_options_for___float128 { flags } {
3423 if { [istarget powerpc*-*-*] } {
3424 return "$flags -mfloat128 -mvsx"
3429 # Return 1 if the target supports any special run-time requirements
3430 # for __float128 or _Float128,
3433 proc check_effective_target_base_quadfloat_support { } {
3434 if { [istarget powerpc*-*-*] } {
3435 return [check_vsx_hw_available]
3440 # Return 1 if the target supports the __bf16 type, 0 otherwise.
3442 proc check_effective_target_bfloat16 {} {
3443 return [check_no_compiler_messages_nocache bfloat16 object {
3444 __bf16 foo (__bf16 x) { return x + x; }
3445 } [add_options_for_bfloat16 ""]]
3448 proc check_effective_target_bfloat16_runtime {} {
3449 return [check_effective_target_bfloat16]
3452 proc add_options_for_bfloat16 { flags } {
3456 # Return 1 if the target supports all four forms of fused multiply-add
3457 # (fma, fms, fnma, and fnms) for both float and double.
3459 proc check_effective_target_scalar_all_fma { } {
3460 return [istarget aarch64*-*-*]
3463 # Return 1 if the target supports compiling fixed-point,
3466 proc check_effective_target_fixed_point { } {
3467 return [check_no_compiler_messages fixed_point object {
3468 _Sat _Fract x; _Sat _Accum y;
3472 # Return 1 if the target supports compiling decimal floating point,
3475 proc check_effective_target_dfp_nocache { } {
3476 verbose "check_effective_target_dfp_nocache: compiling source" 2
3477 set ret [check_no_compiler_messages_nocache dfp object {
3478 float x __attribute__((mode(DD)));
3480 verbose "check_effective_target_dfp_nocache: returning $ret" 2
3484 proc check_effective_target_dfprt_nocache { } {
3485 return [check_runtime_nocache dfprt {
3486 typedef float d64 __attribute__((mode(DD)));
3487 d64 x = 1.2df, y = 2.3dd, z;
3488 int main () { z = x + y; return 0; }
3492 # Return 1 if the target supports compiling Decimal Floating Point,
3495 # This won't change for different subtargets so cache the result.
3497 proc check_effective_target_dfp { } {
3498 return [check_cached_effective_target dfp {
3499 check_effective_target_dfp_nocache
3503 # Return 1 if the target supports linking and executing Decimal Floating
3504 # Point, 0 otherwise.
3506 # This won't change for different subtargets so cache the result.
3508 proc check_effective_target_dfprt { } {
3509 return [check_cached_effective_target dfprt {
3510 check_effective_target_dfprt_nocache
3514 # Return 1 if the target uses the BID format for Decimal Floating
3515 # Point, 0 otherwise.
3517 proc check_effective_target_dfp_bid { } {
3518 if { [istarget aarch64*-*-*]
3519 || [istarget i?86-*-*] || [istarget x86_64-*-*]} {
3525 # Return 1 iff target has unsigned plain 'char' by default.
3527 proc check_effective_target_unsigned_char {} {
3528 return [check_no_compiler_messages unsigned_char assembly {
3533 proc check_effective_target_powerpc_popcntb_ok { } {
3534 return [check_cached_effective_target powerpc_popcntb_ok {
3536 # Disable on Darwin.
3537 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3540 check_runtime_nocache powerpc_popcntb_ok {
3542 volatile int a = 0x12345678;
3545 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
3553 # Return 1 if the target supports executing DFP hardware instructions,
3554 # 0 otherwise. Cache the result.
3556 proc check_dfp_hw_available { } {
3557 return [check_cached_effective_target dfp_hw_available {
3558 # For now, disable on Darwin
3559 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3562 check_runtime_nocache dfp_hw_available {
3563 volatile _Decimal64 r;
3564 volatile _Decimal64 a = 4.0DD;
3565 volatile _Decimal64 b = 2.0DD;
3568 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3569 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3570 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3571 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3574 } "-mcpu=power6 -mhard-float"
3579 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3581 proc check_effective_target_ucn_nocache { } {
3582 # -std=c99 is only valid for C
3583 if [check_effective_target_c] {
3584 set ucnopts "-std=c99"
3588 verbose "check_effective_target_ucn_nocache: compiling source" 2
3589 set ret [check_no_compiler_messages_nocache ucn object {
3592 verbose "check_effective_target_ucn_nocache: returning $ret" 2
3596 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3598 # This won't change for different subtargets, so cache the result.
3600 proc check_effective_target_ucn { } {
3601 return [check_cached_effective_target ucn {
3602 check_effective_target_ucn_nocache
3606 # Return 1 if the target needs a command line argument to enable a SIMD
3609 proc check_effective_target_vect_cmdline_needed { } {
3610 global et_vect_cmdline_needed_target_name
3612 if { ![info exists et_vect_cmdline_needed_target_name] } {
3613 set et_vect_cmdline_needed_target_name ""
3616 # If the target has changed since we set the cached value, clear it.
3617 set current_target [current_target_name]
3618 if { $current_target != $et_vect_cmdline_needed_target_name } {
3619 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3620 set et_vect_cmdline_needed_target_name $current_target
3621 if { [info exists et_vect_cmdline_needed_saved] } {
3622 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
3623 unset et_vect_cmdline_needed_saved
3627 return [check_cached_effective_target vect_cmdline_needed {
3628 if { [istarget alpha*-*-*]
3629 || [istarget ia64-*-*]
3630 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
3631 && ![is-effective-target ia32])
3632 || ([istarget powerpc*-*-*]
3633 && ([check_effective_target_powerpc_spe]
3634 || [check_effective_target_powerpc_altivec]))
3635 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
3636 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
3637 || [istarget aarch64*-*-*]
3638 || [istarget amdgcn*-*-*]} {
3645 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
3647 # This won't change for different subtargets so cache the result.
3649 proc check_effective_target_vect_int { } {
3650 return [check_cached_effective_target_indexed vect_int {
3652 [istarget i?86-*-*] || [istarget x86_64-*-*]
3653 || ([istarget powerpc*-*-*]
3654 && ![istarget powerpc-*-linux*paired*])
3655 || [istarget amdgcn-*-*]
3656 || [istarget sparc*-*-*]
3657 || [istarget alpha*-*-*]
3658 || [istarget ia64-*-*]
3659 || [istarget aarch64*-*-*]
3660 || [is-effective-target arm_neon]
3661 || ([istarget mips*-*-*]
3662 && ([et-is-effective-target mips_loongson_mmi]
3663 || [et-is-effective-target mips_msa]))
3664 || ([istarget s390*-*-*]
3665 && [check_effective_target_s390_vx])
3669 # Return 1 if the target supports hardware vectorization of complex additions of
3670 # byte, 0 otherwise.
3672 # This won't change for different subtargets so cache the result.
3674 proc check_effective_target_vect_complex_add_byte { } {
3675 return [check_cached_effective_target_indexed vect_complex_add_byte {
3677 ([check_effective_target_aarch64_sve2]
3678 && [check_effective_target_aarch64_little_endian])
3679 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3680 && [check_effective_target_arm_little_endian])
3684 # Return 1 if the target supports hardware vectorization of complex additions of
3685 # short, 0 otherwise.
3687 # This won't change for different subtargets so cache the result.
3689 proc check_effective_target_vect_complex_add_short { } {
3690 return [check_cached_effective_target_indexed vect_complex_add_short {
3692 ([check_effective_target_aarch64_sve2]
3693 && [check_effective_target_aarch64_little_endian])
3694 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3695 && [check_effective_target_arm_little_endian])
3699 # Return 1 if the target supports hardware vectorization of complex additions of
3702 # This won't change for different subtargets so cache the result.
3704 proc check_effective_target_vect_complex_add_int { } {
3705 return [check_cached_effective_target_indexed vect_complex_add_int {
3707 ([check_effective_target_aarch64_sve2]
3708 && [check_effective_target_aarch64_little_endian])
3709 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3710 && [check_effective_target_arm_little_endian])
3714 # Return 1 if the target supports hardware vectorization of complex additions of
3715 # long, 0 otherwise.
3717 # This won't change for different subtargets so cache the result.
3719 proc check_effective_target_vect_complex_add_long { } {
3720 return [check_cached_effective_target_indexed vect_complex_add_long {
3722 ([check_effective_target_aarch64_sve2]
3723 && [check_effective_target_aarch64_little_endian])
3724 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3725 && [check_effective_target_arm_little_endian])
3729 # Return 1 if the target supports hardware vectorization of complex additions of
3730 # half, 0 otherwise.
3732 # This won't change for different subtargets so cache the result.
3734 proc check_effective_target_vect_complex_add_half { } {
3735 return [check_cached_effective_target_indexed vect_complex_add_half {
3737 ([check_effective_target_arm_v8_3a_fp16_complex_neon_ok]
3738 && ([check_effective_target_aarch64_little_endian]
3739 || [check_effective_target_arm_little_endian]))
3740 || ([check_effective_target_aarch64_sve2]
3741 && [check_effective_target_aarch64_little_endian])
3742 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3743 && [check_effective_target_arm_little_endian])
3747 # Return 1 if the target supports hardware vectorization of complex additions of
3748 # float, 0 otherwise.
3750 # This won't change for different subtargets so cache the result.
3752 proc check_effective_target_vect_complex_add_float { } {
3753 return [check_cached_effective_target_indexed vect_complex_add_float {
3755 ([check_effective_target_arm_v8_3a_complex_neon_ok]
3756 && ([check_effective_target_aarch64_little_endian]
3757 || [check_effective_target_arm_little_endian]))
3758 || ([check_effective_target_aarch64_sve2]
3759 && [check_effective_target_aarch64_little_endian])
3760 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3761 && [check_effective_target_arm_little_endian])
3765 # Return 1 if the target supports hardware vectorization of complex additions of
3766 # double, 0 otherwise.
3768 # This won't change for different subtargets so cache the result.
3770 proc check_effective_target_vect_complex_add_double { } {
3771 return [check_cached_effective_target_indexed vect_complex_add_double {
3773 (([check_effective_target_arm_v8_3a_complex_neon_ok]
3774 && [check_effective_target_aarch64_little_endian])
3775 || ([check_effective_target_aarch64_sve2]
3776 && [check_effective_target_aarch64_little_endian]))
3780 # Return 1 if the target supports signed int->float conversion
3783 proc check_effective_target_vect_intfloat_cvt { } {
3784 return [check_cached_effective_target_indexed vect_intfloat_cvt {
3785 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3786 || ([istarget powerpc*-*-*]
3787 && ![istarget powerpc-*-linux*paired*])
3788 || [is-effective-target arm_neon]
3789 || ([istarget mips*-*-*]
3790 && [et-is-effective-target mips_msa])
3791 || [istarget amdgcn-*-*]
3792 || ([istarget s390*-*-*]
3793 && [check_effective_target_s390_vxe2]) }}]
3796 # Return 1 if the target supports signed double->int conversion
3799 proc check_effective_target_vect_doubleint_cvt { } {
3800 return [check_cached_effective_target_indexed vect_doubleint_cvt {
3801 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3802 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3803 #ifdef __tune_atom__
3804 # error No double vectorizer support.
3807 || [istarget aarch64*-*-*]
3808 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3809 || ([istarget mips*-*-*]
3810 && [et-is-effective-target mips_msa])
3811 || ([istarget s390*-*-*]
3812 && [check_effective_target_s390_vx]) }}]
3815 # Return 1 if the target supports signed int->double conversion
3818 proc check_effective_target_vect_intdouble_cvt { } {
3819 return [check_cached_effective_target_indexed vect_intdouble_cvt {
3820 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3821 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3822 #ifdef __tune_atom__
3823 # error No double vectorizer support.
3826 || [istarget aarch64*-*-*]
3827 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3828 || ([istarget mips*-*-*]
3829 && [et-is-effective-target mips_msa])
3830 || ([istarget s390*-*-*]
3831 && [check_effective_target_s390_vx]) }}]
3834 #Return 1 if we're supporting __int128 for target, 0 otherwise.
3836 proc check_effective_target_int128 { } {
3837 return [check_no_compiler_messages int128 object {
3839 #ifndef __SIZEOF_INT128__
3848 # Return 1 if the target supports unsigned int->float conversion
3851 proc check_effective_target_vect_uintfloat_cvt { } {
3852 return [check_cached_effective_target_indexed vect_uintfloat_cvt {
3853 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3854 || ([istarget powerpc*-*-*]
3855 && ![istarget powerpc-*-linux*paired*])
3856 || [istarget aarch64*-*-*]
3857 || [is-effective-target arm_neon]
3858 || ([istarget mips*-*-*]
3859 && [et-is-effective-target mips_msa])
3860 || [istarget amdgcn-*-*]
3861 || ([istarget s390*-*-*]
3862 && [check_effective_target_s390_vxe2]) }}]
3866 # Return 1 if the target supports signed float->int conversion
3869 proc check_effective_target_vect_floatint_cvt { } {
3870 return [check_cached_effective_target_indexed vect_floatint_cvt {
3871 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3872 || ([istarget powerpc*-*-*]
3873 && ![istarget powerpc-*-linux*paired*])
3874 || [is-effective-target arm_neon]
3875 || ([istarget mips*-*-*]
3876 && [et-is-effective-target mips_msa])
3877 || [istarget amdgcn-*-*]
3878 || ([istarget s390*-*-*]
3879 && [check_effective_target_s390_vxe2]) }}]
3882 # Return 1 if the target supports unsigned float->int conversion
3885 proc check_effective_target_vect_floatuint_cvt { } {
3886 return [check_cached_effective_target_indexed vect_floatuint_cvt {
3887 expr { ([istarget powerpc*-*-*]
3888 && ![istarget powerpc-*-linux*paired*])
3889 || [is-effective-target arm_neon]
3890 || ([istarget mips*-*-*]
3891 && [et-is-effective-target mips_msa])
3892 || [istarget amdgcn-*-*]
3893 || ([istarget s390*-*-*]
3894 && [check_effective_target_s390_vxe2]) }}]
3897 # Return 1 if peeling for alignment might be profitable on the target
3900 proc check_effective_target_vect_peeling_profitable { } {
3901 return [check_cached_effective_target_indexed vect_peeling_profitable {
3902 expr { ([istarget s390*-*-*]
3903 && [check_effective_target_s390_vx])
3904 || [check_effective_target_vect_element_align_preferred] }}]
3907 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
3909 # This won't change for different subtargets so cache the result.
3911 proc check_effective_target_vect_simd_clones { } {
3912 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3913 # avx2 and avx512f clone. Only the right clone for the
3914 # specified arch will be chosen, but still we need to at least
3915 # be able to assemble avx512f.
3916 return [check_cached_effective_target_indexed vect_simd_clones {
3917 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3918 && [check_effective_target_avx512f])
3919 || [istarget amdgcn-*-*] }}]
3922 # Return 1 if this is a AArch64 target supporting big endian
3923 proc check_effective_target_aarch64_big_endian { } {
3924 return [check_no_compiler_messages aarch64_big_endian assembly {
3925 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3926 #error !__aarch64__ || !__AARCH64EB__
3931 # Return 1 if this is a AArch64 target supporting little endian
3932 proc check_effective_target_aarch64_little_endian { } {
3933 if { ![istarget aarch64*-*-*] } {
3937 return [check_no_compiler_messages aarch64_little_endian assembly {
3938 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3944 # Return 1 if this is an AArch64 target supporting SVE.
3945 proc check_effective_target_aarch64_sve { } {
3946 if { ![istarget aarch64*-*-*] } {
3949 return [check_no_compiler_messages aarch64_sve assembly {
3950 #if !defined (__ARM_FEATURE_SVE)
3956 # Return 1 if this is an AArch64 target supporting SVE2.
3957 proc check_effective_target_aarch64_sve2 { } {
3958 if { ![istarget aarch64*-*-*] } {
3961 return [check_no_compiler_messages aarch64_sve2 assembly {
3962 #if !defined (__ARM_FEATURE_SVE2)
3968 # Return 1 if this is an AArch64 target only supporting SVE (not SVE2).
3969 proc check_effective_target_aarch64_sve1_only { } {
3970 return [expr { [check_effective_target_aarch64_sve]
3971 && ![check_effective_target_aarch64_sve2] }]
3974 # Return the size in bits of an SVE vector, or 0 if the size is variable.
3975 proc aarch64_sve_bits { } {
3976 return [check_cached_effective_target aarch64_sve_bits {
3979 set src dummy[pid].c
3980 set f [open $src "w"]
3981 puts $f "int bits = __ARM_FEATURE_SVE_BITS;"
3983 set output [${tool}_target_compile $src "" preprocess ""]
3986 regsub {.*bits = ([^;]*);.*} $output {\1} bits
3991 # Return 1 if this is a compiler supporting ARC atomic operations
3992 proc check_effective_target_arc_atomic { } {
3993 return [check_no_compiler_messages arc_atomic assembly {
3994 #if !defined(__ARC_ATOMIC__)
4000 # Return 1 if this is an arm target using 32-bit instructions
4001 proc check_effective_target_arm32 { } {
4002 if { ![istarget arm*-*-*] } {
4006 return [check_no_compiler_messages arm32 assembly {
4007 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
4008 #error !__arm || __thumb__ && !__thumb2__
4013 # Return 1 if this is an arm target not using Thumb
4014 proc check_effective_target_arm_nothumb { } {
4015 if { ![istarget arm*-*-*] } {
4019 return [check_no_compiler_messages arm_nothumb assembly {
4020 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
4021 #error !__arm__ || __thumb || __thumb2__
4026 # Return 1 if this is a little-endian ARM target
4027 proc check_effective_target_arm_little_endian { } {
4028 if { ![istarget arm*-*-*] } {
4032 return [check_no_compiler_messages arm_little_endian assembly {
4033 #if !defined(__arm__) || !defined(__ARMEL__)
4034 #error !__arm__ || !__ARMEL__
4039 # Return 1 if this is an ARM target that only supports aligned vector accesses
4040 proc check_effective_target_arm_vect_no_misalign { } {
4041 if { ![istarget arm*-*-*] } {
4045 return [check_no_compiler_messages arm_vect_no_misalign assembly {
4046 #if !defined(__arm__) \
4047 || (defined(__ARM_FEATURE_UNALIGNED) \
4048 && defined(__ARMEL__))
4049 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
4055 # Return 1 if this is an ARM target supporting -mfloat-abi=soft. Some
4056 # multilibs may be incompatible with this option.
4058 proc check_effective_target_arm_soft_ok { } {
4059 return [check_no_compiler_messages arm_soft_ok object {
4062 int main (void) { return 0; }
4063 } "-mfloat-abi=soft"]
4066 # Return 1 if this is an ARM target supporting -mfloat-abi=soft even
4067 # for linking. Some multilibs may be incompatible with this option,
4068 # and some linkers may reject incompatible options.
4070 proc check_effective_target_arm_soft_ok_link { } {
4071 return [check_no_compiler_messages arm_soft_ok_link executable {
4074 int main (void) { return 0; }
4075 } "-mfloat-abi=soft"]
4078 # Return 1 if this is an ARM target supporting -mfpu=vfp with an
4081 proc check_effective_target_arm_vfp_ok_nocache { } {
4082 global et_arm_vfp_flags
4083 set et_arm_vfp_flags ""
4084 if { [check_effective_target_arm32] } {
4085 foreach flags {"-mfpu=vfp" "-mfpu=vfp -mfloat-abi=softfp" "-mfpu=vfp -mfloat-abi=hard"} {
4086 if { [check_no_compiler_messages_nocache arm_vfp_ok object {
4088 #error __ARM_FP not defined
4091 set et_arm_vfp_flags $flags
4100 proc check_effective_target_arm_vfp_ok { } {
4101 return [check_cached_effective_target arm_vfp_ok \
4102 check_effective_target_arm_vfp_ok_nocache]
4105 # Add the options needed to compile code with -mfpu=vfp. We need either
4106 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
4107 # specified by the multilib, use it.
4109 proc add_options_for_arm_vfp { flags } {
4110 if { ! [check_effective_target_arm_vfp_ok] } {
4113 global et_arm_vfp_flags
4114 return "$flags $et_arm_vfp_flags"
4117 # Return 1 if this is an ARM target supporting -mfpu=vfp3
4118 # -mfloat-abi=softfp.
4120 proc check_effective_target_arm_vfp3_ok { } {
4121 if { [check_effective_target_arm32] } {
4122 return [check_no_compiler_messages arm_vfp3_ok object {
4124 } "-mfpu=vfp3 -mfloat-abi=softfp"]
4130 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
4131 # -mfloat-abi=softfp.
4132 proc check_effective_target_arm_v8_vfp_ok {} {
4133 if { [check_effective_target_arm32] } {
4134 return [check_no_compiler_messages arm_v8_vfp_ok object {
4137 __asm__ volatile ("vrinta.f32.f32 s0, s0");
4140 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
4146 # Return 1 if this is an ARM target supporting -mfpu=vfp
4147 # -mfloat-abi=hard. Some multilibs may be incompatible with these
4150 proc check_effective_target_arm_hard_vfp_ok { } {
4151 if { [check_effective_target_arm32]
4152 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
4153 return [check_no_compiler_messages arm_hard_vfp_ok executable {
4154 int main() { return 0;}
4155 } "-mfpu=vfp -mfloat-abi=hard"]
4161 # Return 1 if this is an ARM target defining __ARM_FP. We may need
4162 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4163 # incompatible with these options. Also set et_arm_fp_flags to the
4164 # best options to add.
4166 proc check_effective_target_arm_fp_ok_nocache { } {
4167 global et_arm_fp_flags
4168 set et_arm_fp_flags ""
4169 if { [check_effective_target_arm32] } {
4170 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
4171 if { [check_no_compiler_messages_nocache arm_fp_ok object {
4173 #error __ARM_FP not defined
4176 set et_arm_fp_flags $flags
4185 proc check_effective_target_arm_fp_ok { } {
4186 return [check_cached_effective_target arm_fp_ok \
4187 check_effective_target_arm_fp_ok_nocache]
4190 # Add the options needed to define __ARM_FP. We need either
4191 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
4192 # specified by the multilib, use it.
4194 proc add_options_for_arm_fp { flags } {
4195 if { ! [check_effective_target_arm_fp_ok] } {
4198 global et_arm_fp_flags
4199 return "$flags $et_arm_fp_flags"
4202 # Return 1 if this is an ARM target defining __ARM_FP with
4203 # double-precision support. We may need -mfloat-abi=softfp or
4204 # equivalent options. Some multilibs may be incompatible with these
4205 # options. Also set et_arm_fp_dp_flags to the best options to add.
4207 proc check_effective_target_arm_fp_dp_ok_nocache { } {
4208 global et_arm_fp_dp_flags
4209 set et_arm_fp_dp_flags ""
4210 if { [check_effective_target_arm32] } {
4211 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
4212 if { [check_no_compiler_messages_nocache arm_fp_dp_ok object {
4214 #error __ARM_FP not defined
4216 #if ((__ARM_FP & 8) == 0)
4217 #error __ARM_FP indicates that double-precision is not supported
4220 set et_arm_fp_dp_flags $flags
4229 proc check_effective_target_arm_fp_dp_ok { } {
4230 return [check_cached_effective_target arm_fp_dp_ok \
4231 check_effective_target_arm_fp_dp_ok_nocache]
4234 # Add the options needed to define __ARM_FP with double-precision
4235 # support. We need either -mfloat-abi=softfp or -mfloat-abi=hard, but
4236 # if one is already specified by the multilib, use it.
4238 proc add_options_for_arm_fp_dp { flags } {
4239 if { ! [check_effective_target_arm_fp_dp_ok] } {
4242 global et_arm_fp_dp_flags
4243 return "$flags $et_arm_fp_dp_flags"
4246 # Return 1 if this is an ARM target that supports DSP multiply with
4247 # current multilib flags.
4249 proc check_effective_target_arm_dsp { } {
4250 return [check_no_compiler_messages arm_dsp assembly {
4251 #ifndef __ARM_FEATURE_DSP
4254 #include <arm_acle.h>
4259 # Return 1 if this is an ARM target that supports unaligned word/halfword
4260 # load/store instructions.
4262 proc check_effective_target_arm_unaligned { } {
4263 return [check_no_compiler_messages arm_unaligned assembly {
4264 #ifndef __ARM_FEATURE_UNALIGNED
4265 #error no unaligned support
4271 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
4272 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4273 # incompatible with these options. Also set et_arm_crypto_flags to the
4274 # best options to add.
4276 proc check_effective_target_arm_crypto_ok_nocache { } {
4277 global et_arm_crypto_flags
4278 set et_arm_crypto_flags ""
4279 if { [check_effective_target_arm_v8_neon_ok] } {
4280 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
4281 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
4282 #include "arm_neon.h"
4284 foo (uint8x16_t a, uint8x16_t b)
4286 return vaeseq_u8 (a, b);
4289 set et_arm_crypto_flags $flags
4298 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
4300 proc check_effective_target_arm_crypto_ok { } {
4301 return [check_cached_effective_target arm_crypto_ok \
4302 check_effective_target_arm_crypto_ok_nocache]
4305 # Add options for crypto extensions.
4306 proc add_options_for_arm_crypto { flags } {
4307 if { ! [check_effective_target_arm_crypto_ok] } {
4310 global et_arm_crypto_flags
4311 return "$flags $et_arm_crypto_flags"
4314 # Add the options needed for NEON. We need either -mfloat-abi=softfp
4315 # or -mfloat-abi=hard, but if one is already specified by the
4316 # multilib, use it. Similarly, if a -mfpu option already enables
4317 # NEON, do not add -mfpu=neon.
4319 proc add_options_for_arm_neon { flags } {
4320 if { ! [check_effective_target_arm_neon_ok] } {
4323 global et_arm_neon_flags
4324 return "$flags $et_arm_neon_flags"
4327 proc add_options_for_arm_v8_vfp { flags } {
4328 if { ! [check_effective_target_arm_v8_vfp_ok] } {
4331 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
4334 proc add_options_for_arm_v8_neon { flags } {
4335 if { ! [check_effective_target_arm_v8_neon_ok] } {
4338 global et_arm_v8_neon_flags
4339 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
4342 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
4343 # options for AArch64 and for ARM.
4345 proc add_options_for_arm_v8_1a_neon { flags } {
4346 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
4349 global et_arm_v8_1a_neon_flags
4350 return "$flags $et_arm_v8_1a_neon_flags"
4353 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
4354 # Also adds the ARMv8 FP options for ARM and for AArch64.
4356 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
4357 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4360 global et_arm_v8_2a_fp16_scalar_flags
4361 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
4364 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
4365 # the ARMv8 NEON options for ARM and for AArch64.
4367 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
4368 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4371 global et_arm_v8_2a_fp16_neon_flags
4372 return "$flags $et_arm_v8_2a_fp16_neon_flags"
4375 proc add_options_for_arm_crc { flags } {
4376 if { ! [check_effective_target_arm_crc_ok] } {
4379 global et_arm_crc_flags
4380 return "$flags $et_arm_crc_flags"
4383 # Add the options needed for NEON. We need either -mfloat-abi=softfp
4384 # or -mfloat-abi=hard, but if one is already specified by the
4385 # multilib, use it. Similarly, if a -mfpu option already enables
4386 # NEON, do not add -mfpu=neon.
4388 proc add_options_for_arm_neonv2 { flags } {
4389 if { ! [check_effective_target_arm_neonv2_ok] } {
4392 global et_arm_neonv2_flags
4393 return "$flags $et_arm_neonv2_flags"
4396 # Add the options needed for vfp3.
4397 proc add_options_for_arm_vfp3 { flags } {
4398 if { ! [check_effective_target_arm_vfp3_ok] } {
4401 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
4404 # Return 1 if this is an ARM target supporting -mfpu=neon
4405 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4406 # incompatible with these options. Also set et_arm_neon_flags to the
4407 # best options to add.
4409 proc check_effective_target_arm_neon_ok_nocache { } {
4410 global et_arm_neon_flags
4411 set et_arm_neon_flags ""
4412 if { [check_effective_target_arm32] } {
4413 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
4414 if { [check_no_compiler_messages_nocache arm_neon_ok object {
4415 #include <arm_neon.h>
4417 #ifndef __ARM_NEON__
4420 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
4421 configured for -mcpu=arm926ej-s, for example. */
4422 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
4423 #error Architecture does not support NEON.
4426 set et_arm_neon_flags $flags
4435 proc check_effective_target_arm_neon_ok { } {
4436 return [check_cached_effective_target arm_neon_ok \
4437 check_effective_target_arm_neon_ok_nocache]
4441 # Return 1 if this is an ARM target supporting the SIMD32 intrinsics
4442 # from arm_acle.h. Some multilibs may be incompatible with these options.
4443 # Also set et_arm_simd32_flags to the best options to add.
4444 # arm_acle.h includes stdint.h which can cause trouble with incompatible
4445 # -mfloat-abi= options.
4447 proc check_effective_target_arm_simd32_ok_nocache { } {
4448 global et_arm_simd32_flags
4449 set et_arm_simd32_flags ""
4450 foreach flags {"" "-march=armv6" "-march=armv6 -mfloat-abi=softfp" "-march=armv6 -mfloat-abi=hard"} {
4451 if { [check_no_compiler_messages_nocache arm_simd32_ok object {
4452 #include <arm_acle.h>
4454 #ifndef __ARM_FEATURE_SIMD32
4458 set et_arm_simd32_flags $flags
4466 proc check_effective_target_arm_simd32_ok { } {
4467 return [check_cached_effective_target arm_simd32_ok \
4468 check_effective_target_arm_simd32_ok_nocache]
4471 proc add_options_for_arm_simd32 { flags } {
4472 if { ! [check_effective_target_arm_simd32_ok] } {
4475 global et_arm_simd32_flags
4476 return "$flags $et_arm_simd32_flags"
4479 # Return 1 if this is an ARM target supporting the __ssat and __usat
4480 # saturation intrinsics from arm_acle.h. Some multilibs may be
4481 # incompatible with these options. Also set et_arm_sat_flags to the
4482 # best options to add. arm_acle.h includes stdint.h which can cause
4483 # trouble with incompatible -mfloat-abi= options.
4485 proc check_effective_target_arm_sat_ok_nocache { } {
4486 global et_arm_sat_flags
4487 set et_arm_sat_flags ""
4488 foreach flags {"" "-march=armv6" "-march=armv6 -mfloat-abi=softfp" "-march=armv6 -mfloat-abi=hard -mfpu=vfp"} {
4489 if { [check_no_compiler_messages_nocache et_arm_sat_flags object {
4490 #include <arm_acle.h>
4492 #ifndef __ARM_FEATURE_SAT
4496 set et_arm_sat_flags $flags
4504 proc check_effective_target_arm_sat_ok { } {
4505 return [check_cached_effective_target et_arm_sat_flags \
4506 check_effective_target_arm_sat_ok_nocache]
4509 proc add_options_for_arm_sat { flags } {
4510 if { ! [check_effective_target_arm_sat_ok] } {
4513 global et_arm_sat_flags
4514 return "$flags $et_arm_sat_flags"
4517 # Return 1 if this is an ARM target supporting the DSP intrinsics from
4518 # arm_acle.h. Some multilibs may be incompatible with these options.
4519 # Also set et_arm_dsp_flags to the best options to add.
4520 # arm_acle.h includes stdint.h which can cause trouble with incompatible
4521 # -mfloat-abi= options.
4522 # check_effective_target_arm_dsp also exists, which checks the current
4523 # multilib, without trying other options.
4525 proc check_effective_target_arm_dsp_ok_nocache { } {
4526 global et_arm_dsp_flags
4527 set et_arm_dsp_flags ""
4528 foreach flags {"" "-march=armv5te" "-march=armv5te -mfloat-abi=softfp" "-march=armv5te -mfloat-abi=hard"} {
4529 if { [check_no_compiler_messages_nocache et_arm_dsp_ok object {
4530 #include <arm_acle.h>
4532 #ifndef __ARM_FEATURE_DSP
4536 set et_arm_dsp_flags $flags
4544 proc check_effective_target_arm_dsp_ok { } {
4545 return [check_cached_effective_target et_arm_dsp_flags \
4546 check_effective_target_arm_dsp_ok_nocache]
4549 proc add_options_for_arm_dsp { flags } {
4550 if { ! [check_effective_target_arm_dsp_ok] } {
4553 global et_arm_dsp_flags
4554 return "$flags $et_arm_dsp_flags"
4557 # Return 1 if this is an ARM target supporting -mfpu=neon without any
4558 # -mfloat-abi= option. Useful in tests where add_options is not
4559 # supported (such as lto tests).
4561 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
4562 if { [check_effective_target_arm32] } {
4563 foreach flags {"-mfpu=neon"} {
4564 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
4565 #include <arm_neon.h>
4567 #ifndef __ARM_NEON__
4570 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
4571 configured for -mcpu=arm926ej-s, for example. */
4572 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
4573 #error Architecture does not support NEON.
4584 proc check_effective_target_arm_neon_ok_no_float_abi { } {
4585 return [check_cached_effective_target arm_neon_ok_no_float_abi \
4586 check_effective_target_arm_neon_ok_no_float_abi_nocache]
4589 proc check_effective_target_arm_crc_ok_nocache { } {
4590 global et_arm_crc_flags
4591 set et_arm_crc_flags "-march=armv8-a+crc"
4592 return [check_no_compiler_messages_nocache arm_crc_ok object {
4593 #if !defined (__ARM_FEATURE_CRC32)
4596 #include <arm_acle.h>
4597 } "$et_arm_crc_flags"]
4600 proc check_effective_target_arm_crc_ok { } {
4601 return [check_cached_effective_target arm_crc_ok \
4602 check_effective_target_arm_crc_ok_nocache]
4605 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
4606 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4607 # incompatible with these options. Also set et_arm_neon_fp16_flags to
4608 # the best options to add.
4610 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
4611 global et_arm_neon_fp16_flags
4612 global et_arm_neon_flags
4613 set et_arm_neon_fp16_flags ""
4614 if { [check_effective_target_arm32]
4615 && [check_effective_target_arm_neon_ok] } {
4616 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4617 "-mfpu=neon-fp16 -mfloat-abi=softfp"
4618 "-mfp16-format=ieee"
4619 "-mfloat-abi=softfp -mfp16-format=ieee"
4620 "-mfpu=neon-fp16 -mfp16-format=ieee"
4621 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
4622 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
4623 #include "arm_neon.h"
4625 foo (float32x4_t arg)
4627 return vcvt_f16_f32 (arg);
4629 } "$et_arm_neon_flags $flags"] } {
4630 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
4639 proc check_effective_target_arm_neon_fp16_ok { } {
4640 return [check_cached_effective_target arm_neon_fp16_ok \
4641 check_effective_target_arm_neon_fp16_ok_nocache]
4644 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
4645 # and -mfloat-abi=softfp together. Some multilibs may be
4646 # incompatible with these options. Also set et_arm_neon_softfp_fp16_flags to
4647 # the best options to add.
4649 proc check_effective_target_arm_neon_softfp_fp16_ok_nocache { } {
4650 global et_arm_neon_softfp_fp16_flags
4651 global et_arm_neon_flags
4652 set et_arm_neon_softfp_fp16_flags ""
4653 if { [check_effective_target_arm32]
4654 && [check_effective_target_arm_neon_ok] } {
4655 foreach flags {"-mfpu=neon-fp16 -mfloat-abi=softfp"
4656 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
4657 if { [check_no_compiler_messages_nocache arm_neon_softfp_fp16_ok object {
4658 #include "arm_neon.h"
4660 foo (float32x4_t arg)
4662 return vcvt_f16_f32 (arg);
4664 } "$et_arm_neon_flags $flags"] } {
4665 set et_arm_neon_softfp_fp16_flags [concat $et_arm_neon_flags $flags]
4674 proc check_effective_target_arm_neon_softfp_fp16_ok { } {
4675 return [check_cached_effective_target arm_neon_softfp_fp16_ok \
4676 check_effective_target_arm_neon_softfp_fp16_ok_nocache]
4681 proc check_effective_target_arm_neon_fp16_hw { } {
4682 if {! [check_effective_target_arm_neon_fp16_ok] } {
4685 global et_arm_neon_fp16_flags
4686 check_runtime arm_neon_fp16_hw {
4688 main (int argc, char **argv)
4690 asm ("vcvt.f32.f16 q1, d0");
4693 } $et_arm_neon_fp16_flags
4696 proc add_options_for_arm_neon_fp16 { flags } {
4697 if { ! [check_effective_target_arm_neon_fp16_ok] } {
4700 global et_arm_neon_fp16_flags
4701 return "$flags $et_arm_neon_fp16_flags"
4704 proc add_options_for_arm_neon_softfp_fp16 { flags } {
4705 if { ! [check_effective_target_arm_neon_softfp_fp16_ok] } {
4708 global et_arm_neon_softfp_fp16_flags
4709 return "$flags $et_arm_neon_softfp_fp16_flags"
4712 proc add_options_for_aarch64_sve { flags } {
4713 if { ![istarget aarch64*-*-*] || [check_effective_target_aarch64_sve] } {
4716 return "$flags -march=armv8.2-a+sve"
4719 # Return 1 if this is an ARM target supporting the FP16 alternative
4720 # format. Some multilibs may be incompatible with the options needed. Also
4721 # set et_arm_neon_fp16_flags to the best options to add.
4723 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
4724 if { [istarget *-*-vxworks7*] } {
4725 # Not supported by the target system.
4728 global et_arm_neon_fp16_flags
4729 set et_arm_neon_fp16_flags ""
4730 if { [check_effective_target_arm32] } {
4731 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4732 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
4733 if { [check_no_compiler_messages_nocache \
4734 arm_fp16_alternative_ok object {
4735 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
4736 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
4738 } "$flags -mfp16-format=alternative"] } {
4739 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
4748 proc check_effective_target_arm_fp16_alternative_ok { } {
4749 return [check_cached_effective_target arm_fp16_alternative_ok \
4750 check_effective_target_arm_fp16_alternative_ok_nocache]
4753 # Return 1 if this is an ARM target supports specifying the FP16 none
4754 # format. Some multilibs may be incompatible with the options needed.
4756 proc check_effective_target_arm_fp16_none_ok_nocache { } {
4757 if { [check_effective_target_arm32] } {
4758 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4759 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
4760 if { [check_no_compiler_messages_nocache \
4761 arm_fp16_none_ok object {
4762 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
4763 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
4765 #if defined (__ARM_FP16_FORMAT_IEEE)
4766 #error __ARM_FP16_FORMAT_IEEE defined
4768 } "$flags -mfp16-format=none"] } {
4777 proc check_effective_target_arm_fp16_none_ok { } {
4778 return [check_cached_effective_target arm_fp16_none_ok \
4779 check_effective_target_arm_fp16_none_ok_nocache]
4782 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
4783 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4784 # incompatible with these options. Also set et_arm_v8_neon_flags to the
4785 # best options to add.
4787 proc check_effective_target_arm_v8_neon_ok_nocache { } {
4788 global et_arm_v8_neon_flags
4789 set et_arm_v8_neon_flags ""
4790 if { [check_effective_target_arm32] } {
4791 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4792 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
4794 #error not armv8 or later
4796 #include "arm_neon.h"
4800 __asm__ volatile ("vrintn.f32 q0, q0");
4802 } "$flags -march=armv8-a"] } {
4803 set et_arm_v8_neon_flags $flags
4812 proc check_effective_target_arm_v8_neon_ok { } {
4813 return [check_cached_effective_target arm_v8_neon_ok \
4814 check_effective_target_arm_v8_neon_ok_nocache]
4817 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
4818 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4819 # incompatible with these options. Also set et_arm_neonv2_flags to the
4820 # best options to add.
4822 proc check_effective_target_arm_neonv2_ok_nocache { } {
4823 global et_arm_neonv2_flags
4824 global et_arm_neon_flags
4825 set et_arm_neonv2_flags ""
4826 if { [check_effective_target_arm32]
4827 && [check_effective_target_arm_neon_ok] } {
4828 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
4829 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
4830 #include "arm_neon.h"
4832 foo (float32x2_t a, float32x2_t b, float32x2_t c)
4834 return vfma_f32 (a, b, c);
4836 } "$et_arm_neon_flags $flags"] } {
4837 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
4846 proc check_effective_target_arm_neonv2_ok { } {
4847 return [check_cached_effective_target arm_neonv2_ok \
4848 check_effective_target_arm_neonv2_ok_nocache]
4851 # Add the options needed for VFP FP16 support. We need either
4852 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
4853 # the multilib, use it.
4855 proc add_options_for_arm_fp16 { flags } {
4856 if { ! [check_effective_target_arm_fp16_ok] } {
4859 global et_arm_fp16_flags
4860 return "$flags $et_arm_fp16_flags"
4863 # Add the options needed to enable support for IEEE format
4864 # half-precision support. This is valid for ARM targets.
4866 proc add_options_for_arm_fp16_ieee { flags } {
4867 if { ! [check_effective_target_arm_fp16_ok] } {
4870 global et_arm_fp16_flags
4871 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
4874 # Add the options needed to enable support for ARM Alternative format
4875 # half-precision support. This is valid for ARM targets.
4877 proc add_options_for_arm_fp16_alternative { flags } {
4878 if { ! [check_effective_target_arm_fp16_ok] } {
4881 global et_arm_fp16_flags
4882 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
4885 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
4886 # Skip multilibs that are incompatible with these options and set
4887 # et_arm_fp16_flags to the best options to add. This test is valid for
4890 proc check_effective_target_arm_fp16_ok_nocache { } {
4891 global et_arm_fp16_flags
4892 set et_arm_fp16_flags ""
4893 if { ! [check_effective_target_arm32] } {
4897 [list "" { *-*-* } { "-mfpu=*" } \
4898 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
4899 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
4900 # Multilib flags would override -mfpu.
4903 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
4904 # Must generate floating-point instructions.
4907 if [check_effective_target_arm_hf_eabi] {
4908 # Use existing float-abi and force an fpu which supports fp16
4909 set et_arm_fp16_flags "-mfpu=vfpv4"
4912 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
4913 # The existing -mfpu value is OK; use it, but add softfp.
4914 set et_arm_fp16_flags "-mfloat-abi=softfp"
4917 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
4918 # macro to check for this support.
4919 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
4920 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
4923 set et_arm_fp16_flags "$flags"
4930 proc check_effective_target_arm_fp16_ok { } {
4931 return [check_cached_effective_target arm_fp16_ok \
4932 check_effective_target_arm_fp16_ok_nocache]
4935 # Return 1 if the target supports executing VFP FP16 instructions, 0
4936 # otherwise. This test is valid for ARM only.
4938 proc check_effective_target_arm_fp16_hw { } {
4939 if {! [check_effective_target_arm_fp16_ok] } {
4942 global et_arm_fp16_flags
4943 check_runtime arm_fp16_hw {
4945 main (int argc, char **argv)
4949 asm ("vcvtb.f32.f16 %0, %1"
4950 : "=w" (r) : "w" (a)
4951 : /* No clobbers. */);
4952 return (r == 1.0) ? 0 : 1;
4954 } "$et_arm_fp16_flags -mfp16-format=ieee"
4957 # Creates a series of routines that return 1 if the given architecture
4958 # can be selected and a routine to give the flags to select that architecture
4959 # Note: Extra flags may be added to disable options from newer compilers
4960 # (Thumb in particular - but others may be added in the future).
4961 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4962 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4963 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4964 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4965 # /* { dg-add-options arm_arch_v5t } */
4966 # /* { dg-require-effective-target arm_arch_v5t_multilib } */
4967 foreach { armfunc armflag armdefs } {
4968 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4969 v4t "-march=armv4t -mfloat-abi=softfp" __ARM_ARCH_4T__
4970 v4t_arm "-march=armv4t -marm" __ARM_ARCH_4T__
4971 v4t_thumb "-march=armv4t -mthumb -mfloat-abi=softfp" __ARM_ARCH_4T__
4972 v5t "-march=armv5t -mfloat-abi=softfp" __ARM_ARCH_5T__
4973 v5t_arm "-march=armv5t -marm" __ARM_ARCH_5T__
4974 v5t_thumb "-march=armv5t -mthumb -mfloat-abi=softfp" __ARM_ARCH_5T__
4975 v5te "-march=armv5te -mfloat-abi=softfp" __ARM_ARCH_5TE__
4976 v5te_arm "-march=armv5te -marm" __ARM_ARCH_5TE__
4977 v5te_thumb "-march=armv5te -mthumb -mfloat-abi=softfp" __ARM_ARCH_5TE__
4978 v6 "-march=armv6 -mfloat-abi=softfp" __ARM_ARCH_6__
4979 v6_arm "-march=armv6 -marm" __ARM_ARCH_6__
4980 v6_thumb "-march=armv6 -mthumb -mfloat-abi=softfp" __ARM_ARCH_6__
4981 v6k "-march=armv6k -mfloat-abi=softfp" __ARM_ARCH_6K__
4982 v6k_arm "-march=armv6k -marm" __ARM_ARCH_6K__
4983 v6k_thumb "-march=armv6k -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__
4984 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4985 v6z "-march=armv6z -mfloat-abi=softfp" __ARM_ARCH_6Z__
4986 v6z_arm "-march=armv6z -marm" __ARM_ARCH_6Z__
4987 v6z_thumb "-march=armv6z -mthumb -mfloat-abi=softfp" __ARM_ARCH_6Z__
4988 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4989 v7a "-march=armv7-a" __ARM_ARCH_7A__
4990 v7r "-march=armv7-r" __ARM_ARCH_7R__
4991 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4992 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4993 v7ve "-march=armv7ve -marm"
4994 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4995 v8a "-march=armv8-a" __ARM_ARCH_8A__
4996 v8a_hard "-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=hard" __ARM_ARCH_8A__
4997 v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__
4998 v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__
4999 v8r "-march=armv8-r" __ARM_ARCH_8R__
5000 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
5001 __ARM_ARCH_8M_BASE__
5002 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
5003 v8_1m_main "-march=armv8.1-m.main -mthumb" __ARM_ARCH_8M_MAIN__
5004 v9a "-march=armv9-a" __ARM_ARCH_9A__ } {
5005 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
5006 proc check_effective_target_arm_arch_FUNC_ok { } {
5007 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
5019 proc add_options_for_arm_arch_FUNC { flags } {
5020 return "$flags FLAG"
5023 proc check_effective_target_arm_arch_FUNC_multilib { } {
5024 return [check_runtime arm_arch_FUNC_multilib {
5030 } [add_options_for_arm_arch_FUNC ""]]
5035 # Return 1 if GCC was configured with --with-mode=
5036 proc check_effective_target_default_mode { } {
5038 return [check_configured_with "with-mode="]
5041 # Return 1 if this is an ARM target where -marm causes ARM to be
5044 proc check_effective_target_arm_arm_ok { } {
5045 return [check_no_compiler_messages arm_arm_ok assembly {
5046 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
5047 #error !__arm__ || __thumb__ || __thumb2__
5053 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
5056 proc check_effective_target_arm_thumb1_ok { } {
5057 return [check_no_compiler_messages arm_thumb1_ok assembly {
5058 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
5059 #error !__arm__ || !__thumb__ || __thumb2__
5061 int foo (int i) { return i; }
5065 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
5068 proc check_effective_target_arm_thumb2_ok { } {
5069 return [check_no_compiler_messages arm_thumb2_ok assembly {
5070 #if !defined(__thumb2__)
5073 int foo (int i) { return i; }
5077 # Return 1 if this is an ARM target where Thumb-1 is used without options
5078 # added by the test.
5080 proc check_effective_target_arm_thumb1 { } {
5081 return [check_no_compiler_messages arm_thumb1 assembly {
5082 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
5083 #error !__arm__ || !__thumb__ || __thumb2__
5089 # Return 1 if this is an ARM target where Thumb-2 is used without options
5090 # added by the test.
5092 proc check_effective_target_arm_thumb2 { } {
5093 return [check_no_compiler_messages arm_thumb2 assembly {
5094 #if !defined(__thumb2__)
5101 # Return 1 if this is an ARM target where conditional execution is available.
5103 proc check_effective_target_arm_cond_exec { } {
5104 return [check_no_compiler_messages arm_cond_exec assembly {
5105 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
5112 # Return 1 if this is an ARM cortex-M profile cpu
5114 proc check_effective_target_arm_cortex_m { } {
5115 if { ![istarget arm*-*-*] } {
5118 return [check_no_compiler_messages arm_cortex_m assembly {
5119 #if defined(__ARM_ARCH_ISA_ARM)
5120 #error __ARM_ARCH_ISA_ARM is defined
5126 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
5127 # used and MOVT/MOVW instructions to be available.
5129 proc check_effective_target_arm_thumb1_movt_ok {} {
5130 if [check_effective_target_arm_thumb1_ok] {
5131 return [check_no_compiler_messages arm_movt object {
5135 asm ("movt r0, #42");
5143 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
5144 # used and CBZ and CBNZ instructions are available.
5146 proc check_effective_target_arm_thumb1_cbz_ok {} {
5147 if [check_effective_target_arm_thumb1_ok] {
5148 return [check_no_compiler_messages arm_movt object {
5152 asm ("cbz r0, 2f\n2:");
5160 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
5163 proc check_effective_target_arm_cmse_ok {} {
5164 return [check_no_compiler_messages arm_cmse object {
5173 # Return 1 if the target supports executing CMSE instructions, 0
5174 # otherwise. Cache the result.
5176 proc check_effective_target_arm_cmse_hw { } {
5177 return [check_runtime arm_cmse_hw_available {
5181 asm ("ldr\t%0, =0xe000ed44\n" \
5183 "sg" : "=l" (id_pfr1));
5184 /* Exit with code 0 iff security extension is available. */
5185 return !(id_pfr1 & 0xf0);
5190 # Return 1 if the target supports executing MVE instructions, 0
5193 proc check_effective_target_arm_mve_hw {} {
5194 return [check_runtime arm_mve_hw_available {
5200 asm ("sqrshrl %Q1, %R1, #64, %2"
5202 : "0" (a), "r" (b));
5205 } [add_options_for_arm_v8_1m_mve_fp ""]]
5208 # Return 1 if this is an ARM target where ARMv8-M Security Extensions with
5209 # clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.
5211 proc check_effective_target_arm_cmse_clear_ok {} {
5212 return [check_no_compiler_messages arm_cmse_clear object {
5216 asm ("clrm {r1, r2}");
5221 # Return 1 if this is an ARM target supporting
5222 # -mbranch-protection=standard, 0 otherwise.
5224 proc check_effective_target_mbranch_protection_ok {} {
5226 return [check_no_compiler_messages mbranch_protection_ok object {
5227 int main (void) { return 0; }
5228 } "-mbranch-protection=standard"]
5231 # Return 1 if the target supports executing PACBTI instructions, 0
5234 proc check_effective_target_arm_pacbti_hw {} {
5235 return [check_runtime arm_pacbti_hw_available {
5236 __attribute__ ((naked)) int
5239 asm ("pac r12, lr, sp");
5241 asm ("autg r12, lr, sp");
5244 } "-march=armv8.1-m.main+pacbti+fp -mbranch-protection=standard -mthumb -mfloat-abi=hard"]
5247 # Return 1 if this compilation turns on string_ops_prefer_neon on.
5249 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
5250 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
5251 int foo (void) { return 0; }
5252 } "-O2 -mprint-tune-info" ]
5255 # Return 1 if the target supports executing NEON instructions, 0
5256 # otherwise. Cache the result.
5258 proc check_effective_target_arm_neon_hw { } {
5259 return [check_runtime arm_neon_hw_available {
5263 long long a = 0, b = 1;
5264 asm ("vorr %P0, %P1, %P2"
5266 : "0" (a), "w" (b));
5269 } [add_options_for_arm_neon ""]]
5272 # Return true if this is an AArch64 target that can run SVE code.
5274 proc check_effective_target_aarch64_sve_hw { } {
5275 if { ![istarget aarch64*-*-*] } {
5278 return [check_runtime aarch64_sve_hw_available {
5282 asm volatile ("ptrue p0.b");
5285 } [add_options_for_aarch64_sve ""]]
5288 # Return true if this is an AArch64 target that can run SVE2 code.
5290 proc check_effective_target_aarch64_sve2_hw { } {
5291 if { ![istarget aarch64*-*-*] } {
5294 return [check_runtime aarch64_sve2_hw_available {
5298 asm volatile ("addp z0.b, p0/m, z0.b, z1.b");
5304 # Return true if this is an AArch64 target that can run SVE code and
5305 # if its SVE vectors have exactly BITS bits.
5307 proc aarch64_sve_hw_bits { bits } {
5308 if { ![check_effective_target_aarch64_sve_hw] } {
5311 return [check_runtime aarch64_sve${bits}_hw [subst {
5316 asm volatile ("cntd %0" : "=r" (res));
5317 if (res * 64 != $bits)
5321 }] [add_options_for_aarch64_sve ""]]
5324 # Return true if this is an AArch64 target that can run SVE code and
5325 # if its SVE vectors have exactly 256 bits.
5327 foreach N { 128 256 512 1024 2048 } {
5328 eval [string map [list N $N] {
5329 proc check_effective_target_aarch64_sveN_hw { } {
5330 return [aarch64_sve_hw_bits N]
5335 proc check_effective_target_arm_neonv2_hw { } {
5336 return [check_runtime arm_neon_hwv2_available {
5337 #include "arm_neon.h"
5341 float32x2_t a, b, c;
5342 asm ("vfma.f32 %P0, %P1, %P2"
5344 : "w" (b), "w" (c));
5347 } [add_options_for_arm_neonv2 ""]]
5350 # ID_AA64PFR1_EL1.BT using bits[3:0] == 1 implies BTI implimented.
5351 proc check_effective_target_aarch64_bti_hw { } {
5352 if { ![istarget aarch64*-*-*] } {
5355 return [check_runtime aarch64_bti_hw_available {
5360 asm volatile ("mrs %0, id_aa64pfr1_el1" : "=r" (a));
5361 return !((a & 0xf) == 1);
5366 # Return 1 if the target supports executing the armv8.3-a FJCVTZS
5368 proc check_effective_target_aarch64_fjcvtzs_hw { } {
5369 if { ![istarget aarch64*-*-*] } {
5372 return [check_runtime aarch64_fjcvtzs_hw_available {
5378 asm volatile ("fjcvtzs %w0, %d1"
5381 : /* No clobbers. */);
5384 } "-march=armv8.3-a" ]
5387 # Return 1 if GCC was configured with --enable-standard-branch-protection
5388 proc check_effective_target_default_branch_protection { } {
5389 return [check_configured_with "enable-standard-branch-protection"]
5392 # Return 1 if this is an ARM target supporting -mfloat-abi=softfp.
5394 proc check_effective_target_arm_softfp_ok { } {
5395 return [check_no_compiler_messages arm_softfp_ok object {
5398 int main (void) { return 0; }
5399 } "-mfloat-abi=softfp"]
5402 # Return 1 if this is an ARM target supporting -mfloat-abi=hard.
5404 proc check_effective_target_arm_hard_ok { } {
5405 return [check_no_compiler_messages arm_hard_ok object {
5408 int main (void) { return 0; }
5409 } "-mfloat-abi=hard"]
5412 # Return 1 if this is an ARM target supporting MVE.
5413 proc check_effective_target_arm_mve { } {
5414 if { ![istarget arm*-*-*] } {
5417 return [check_no_compiler_messages arm_mve assembly {
5418 #if !defined (__ARM_FEATURE_MVE)
5424 # Return 1 if the target supports ARMv8.1-M MVE with floating point
5425 # instructions, 0 otherwise. The test is valid for ARM.
5426 # Record the command line options needed.
5428 proc check_effective_target_arm_v8_1m_mve_fp_ok_nocache { } {
5429 global et_arm_v8_1m_mve_fp_flags
5430 set et_arm_v8_1m_mve_fp_flags ""
5432 if { ![istarget arm*-*-*] } {
5436 # Iterate through sets of options to find the compiler flags that
5437 # need to be added to the -march option.
5438 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto -march=armv8.1-m.main+mve.fp" "-mfloat-abi=hard -mfpu=auto -march=armv8.1-m.main+mve.fp"} {
5439 if { [check_no_compiler_messages_nocache \
5440 arm_v8_1m_mve_fp_ok object {
5441 #include <arm_mve.h>
5442 #if !(__ARM_FEATURE_MVE & 2)
5443 #error "__ARM_FEATURE_MVE for floating point not defined"
5445 #if __ARM_BIG_ENDIAN
5446 #error "MVE intrinsics are not supported in Big-Endian mode."
5448 } "$flags -mthumb"] } {
5449 set et_arm_v8_1m_mve_fp_flags "$flags -mthumb --save-temps"
5457 proc check_effective_target_arm_v8_1m_mve_fp_ok { } {
5458 return [check_cached_effective_target arm_v8_1m_mve_fp_ok \
5459 check_effective_target_arm_v8_1m_mve_fp_ok_nocache]
5462 proc add_options_for_arm_v8_1m_mve_fp { flags } {
5463 if { ! [check_effective_target_arm_v8_1m_mve_fp_ok] } {
5466 global et_arm_v8_1m_mve_fp_flags
5467 return "$flags $et_arm_v8_1m_mve_fp_flags"
5470 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
5471 # otherwise. The test is valid for AArch64 and ARM. Record the command
5472 # line options needed.
5474 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
5475 global et_arm_v8_1a_neon_flags
5476 set et_arm_v8_1a_neon_flags ""
5478 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5482 # Iterate through sets of options to find the compiler flags that
5483 # need to be added to the -march option. Start with the empty set
5484 # since AArch64 only needs the -march setting.
5485 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
5486 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
5487 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
5488 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
5489 #if !defined (__ARM_FEATURE_QRDMX)
5490 #error "__ARM_FEATURE_QRDMX not defined"
5492 } "$flags $arches"] } {
5493 set et_arm_v8_1a_neon_flags "$flags $arches"
5502 proc check_effective_target_arm_v8_1a_neon_ok { } {
5503 return [check_cached_effective_target arm_v8_1a_neon_ok \
5504 check_effective_target_arm_v8_1a_neon_ok_nocache]
5507 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
5508 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5509 # Record the command line options needed.
5511 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
5512 global et_arm_v8_2a_fp16_scalar_flags
5513 set et_arm_v8_2a_fp16_scalar_flags ""
5515 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5519 # Iterate through sets of options to find the compiler flags that
5520 # need to be added to the -march option.
5521 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
5522 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
5523 if { [check_no_compiler_messages_nocache \
5524 arm_v8_2a_fp16_scalar_ok object {
5525 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
5526 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
5528 } "$flags -march=armv8.2-a+fp16"] } {
5529 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
5537 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
5538 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
5539 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
5542 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
5543 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5544 # Record the command line options needed.
5546 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
5547 global et_arm_v8_2a_fp16_neon_flags
5548 set et_arm_v8_2a_fp16_neon_flags ""
5550 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5554 # Iterate through sets of options to find the compiler flags that
5555 # need to be added to the -march option.
5556 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
5557 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
5558 if { [check_no_compiler_messages_nocache \
5559 arm_v8_2a_fp16_neon_ok object {
5560 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
5561 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
5563 } "$flags -march=armv8.2-a+fp16"] } {
5564 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
5572 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
5573 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
5574 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
5577 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
5578 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5579 # Record the command line options needed.
5581 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
5582 global et_arm_v8_2a_dotprod_neon_flags
5583 set et_arm_v8_2a_dotprod_neon_flags ""
5585 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5589 # Iterate through sets of options to find the compiler flags that
5590 # need to be added to the -march option.
5591 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
5592 if { [check_no_compiler_messages_nocache \
5593 arm_v8_2a_dotprod_neon_ok object {
5595 #if !defined (__ARM_FEATURE_DOTPROD)
5596 #error "__ARM_FEATURE_DOTPROD not defined"
5598 } "$flags -march=armv8.2-a+dotprod"] } {
5599 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
5607 # Return 1 if the target supports ARMv8.1-M MVE
5608 # instructions, 0 otherwise. The test is valid for ARM.
5609 # Record the command line options needed.
5611 proc check_effective_target_arm_v8_1m_mve_ok_nocache { } {
5612 global et_arm_v8_1m_mve_flags
5613 set et_arm_v8_1m_mve_flags ""
5615 if { ![istarget arm*-*-*] } {
5619 # Iterate through sets of options to find the compiler flags that
5620 # need to be added to the -march option.
5621 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto -march=armv8.1-m.main+mve" "-mfloat-abi=hard -mfpu=auto -march=armv8.1-m.main+mve"} {
5622 if { [check_no_compiler_messages_nocache \
5623 arm_v8_1m_mve_ok object {
5624 #if !defined (__ARM_FEATURE_MVE)
5625 #error "__ARM_FEATURE_MVE not defined"
5627 #if __ARM_BIG_ENDIAN
5628 #error "MVE intrinsics are not supported in Big-Endian mode."
5630 #include <arm_mve.h>
5631 } "$flags -mthumb"] } {
5632 set et_arm_v8_1m_mve_flags "$flags -mthumb --save-temps"
5640 proc check_effective_target_arm_v8_1m_mve_ok { } {
5641 return [check_cached_effective_target arm_v8_1m_mve_ok \
5642 check_effective_target_arm_v8_1m_mve_ok_nocache]
5645 proc add_options_for_arm_v8_1m_mve { flags } {
5646 if { ! [check_effective_target_arm_v8_1m_mve_ok] } {
5649 global et_arm_v8_1m_mve_flags
5650 return "$flags $et_arm_v8_1m_mve_flags"
5653 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
5654 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
5655 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
5658 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
5659 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
5662 global et_arm_v8_2a_dotprod_neon_flags
5663 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
5666 # Return 1 if the target supports ARMv8.2+i8mm Adv.SIMD Dot Product
5667 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5668 # Record the command line options needed.
5670 proc check_effective_target_arm_v8_2a_i8mm_ok_nocache { } {
5671 global et_arm_v8_2a_i8mm_flags
5672 set et_arm_v8_2a_i8mm_flags ""
5674 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5678 # Iterate through sets of options to find the compiler flags that
5679 # need to be added to the -march option.
5680 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8" } {
5681 if { [check_no_compiler_messages_nocache \
5682 arm_v8_2a_i8mm_ok object {
5683 #include <arm_neon.h>
5684 #if !defined (__ARM_FEATURE_MATMUL_INT8)
5685 #error "__ARM_FEATURE_MATMUL_INT8 not defined"
5687 } "$flags -march=armv8.2-a+i8mm"] } {
5688 set et_arm_v8_2a_i8mm_flags "$flags -march=armv8.2-a+i8mm"
5696 proc check_effective_target_arm_v8_2a_i8mm_ok { } {
5697 return [check_cached_effective_target arm_v8_2a_i8mm_ok \
5698 check_effective_target_arm_v8_2a_i8mm_ok_nocache]
5701 proc add_options_for_arm_v8_2a_i8mm { flags } {
5702 if { ! [check_effective_target_arm_v8_2a_i8mm_ok] } {
5705 global et_arm_v8_2a_i8mm_flags
5706 return "$flags $et_arm_v8_2a_i8mm_flags"
5709 # Return 1 if the target supports FP16 VFMAL and VFMSL
5710 # instructions, 0 otherwise.
5711 # Record the command line options needed.
5713 proc check_effective_target_arm_fp16fml_neon_ok_nocache { } {
5714 global et_arm_fp16fml_neon_flags
5715 set et_arm_fp16fml_neon_flags ""
5717 if { ![istarget arm*-*-*] } {
5721 # Iterate through sets of options to find the compiler flags that
5722 # need to be added to the -march option.
5723 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
5724 if { [check_no_compiler_messages_nocache \
5725 arm_fp16fml_neon_ok assembly {
5726 #include <arm_neon.h>
5728 foo (float32x2_t r, float16x4_t a, float16x4_t b)
5730 return vfmlal_high_f16 (r, a, b);
5732 } "$flags -march=armv8.2-a+fp16fml"] } {
5733 set et_arm_fp16fml_neon_flags "$flags -march=armv8.2-a+fp16fml"
5741 proc check_effective_target_arm_fp16fml_neon_ok { } {
5742 return [check_cached_effective_target arm_fp16fml_neon_ok \
5743 check_effective_target_arm_fp16fml_neon_ok_nocache]
5746 proc add_options_for_arm_fp16fml_neon { flags } {
5747 if { ! [check_effective_target_arm_fp16fml_neon_ok] } {
5750 global et_arm_fp16fml_neon_flags
5751 return "$flags $et_arm_fp16fml_neon_flags"
5754 # Return 1 if the target supports BFloat16 SIMD instructions, 0 otherwise.
5755 # The test is valid for ARM and for AArch64.
5757 proc check_effective_target_arm_v8_2a_bf16_neon_ok_nocache { } {
5758 global et_arm_v8_2a_bf16_neon_flags
5759 set et_arm_v8_2a_bf16_neon_flags ""
5761 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5765 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8" } {
5766 if { [check_no_compiler_messages_nocache arm_v8_2a_bf16_neon_ok object {
5767 #include <arm_neon.h>
5768 #if !defined (__ARM_FEATURE_BF16_VECTOR_ARITHMETIC)
5769 #error "__ARM_FEATURE_BF16_VECTOR_ARITHMETIC not defined"
5771 } "$flags -march=armv8.2-a+bf16"] } {
5772 set et_arm_v8_2a_bf16_neon_flags "$flags -march=armv8.2-a+bf16"
5780 proc check_effective_target_arm_v8_2a_bf16_neon_ok { } {
5781 return [check_cached_effective_target arm_v8_2a_bf16_neon_ok \
5782 check_effective_target_arm_v8_2a_bf16_neon_ok_nocache]
5785 proc add_options_for_arm_v8_2a_bf16_neon { flags } {
5786 if { ! [check_effective_target_arm_v8_2a_bf16_neon_ok] } {
5789 global et_arm_v8_2a_bf16_neon_flags
5790 return "$flags $et_arm_v8_2a_bf16_neon_flags"
5793 # A series of routines are created to 1) check if a given architecture is
5794 # effective (check_effective_target_*_ok) and then 2) give the corresponding
5795 # flags that enable the architecture (add_options_for_*).
5796 # The series includes:
5797 # arm_v8m_main_cde: Armv8-m CDE (Custom Datapath Extension).
5798 # arm_v8m_main_cde_fp: Armv8-m CDE with FP registers.
5799 # arm_v8_1m_main_cde_mve: Armv8.1-m CDE with MVE.
5801 # /* { dg-require-effective-target arm_v8m_main_cde_ok } */
5802 # /* { dg-add-options arm_v8m_main_cde } */
5803 # The tests are valid for Arm.
5805 foreach { armfunc armflag armdef arminc } {
5807 "-march=armv8-m.main+cdecp0+cdecp6 -mthumb"
5808 "defined (__ARM_FEATURE_CDE)"
5811 "-march=armv8-m.main+fp+cdecp0+cdecp6 -mthumb -mfpu=auto"
5812 "defined (__ARM_FEATURE_CDE) && defined (__ARM_FP)"
5814 arm_v8_1m_main_cde_mve
5815 "-march=armv8.1-m.main+mve+cdecp0+cdecp6 -mthumb -mfpu=auto"
5816 "defined (__ARM_FEATURE_CDE) && defined (__ARM_FEATURE_MVE)"
5817 "#include <arm_mve.h>"
5818 arm_v8_1m_main_cde_mve_fp
5819 "-march=armv8.1-m.main+mve.fp+cdecp0+cdecp6 -mthumb -mfpu=auto"
5820 "defined (__ARM_FEATURE_CDE) || __ARM_FEATURE_MVE == 3"
5821 "#include <arm_mve.h>"
5823 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef INC $arminc ] {
5824 proc check_effective_target_FUNC_ok_nocache { } {
5825 global et_FUNC_flags
5826 set et_FUNC_flags ""
5828 if { ![istarget arm*-*-*] } {
5832 if { [check_no_compiler_messages_nocache FUNC_ok assembly {
5836 #include <arm_cde.h>
5839 set et_FUNC_flags "FLAG"
5846 proc check_effective_target_FUNC_ok { } {
5847 return [check_cached_effective_target FUNC_ok \
5848 check_effective_target_FUNC_ok_nocache]
5851 proc add_options_for_FUNC { flags } {
5852 if { ! [check_effective_target_FUNC_ok] } {
5855 global et_FUNC_flags
5856 return "$flags $et_FUNC_flags"
5859 proc check_effective_target_FUNC_multilib { } {
5860 if { ! [check_effective_target_FUNC_ok] } {
5863 return [check_runtime FUNC_multilib {
5867 #include <arm_cde.h>
5874 } [add_options_for_FUNC ""]]
5879 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
5882 proc check_effective_target_arm_v8_neon_hw { } {
5883 return [check_runtime arm_v8_neon_hw_available {
5884 #include "arm_neon.h"
5888 float32x2_t a = { 1.0f, 2.0f };
5889 #ifdef __ARM_ARCH_ISA_A64
5890 asm ("frinta %0.2s, %1.2s"
5894 asm ("vrinta.f32 %P0, %P1"
5898 return a[0] == 2.0f;
5900 } [add_options_for_arm_v8_neon ""]]
5903 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
5904 # otherwise. The test is valid for AArch64 and ARM.
5906 proc check_effective_target_arm_v8_1a_neon_hw { } {
5907 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
5910 return [check_runtime arm_v8_1a_neon_hw_available {
5914 #ifdef __ARM_ARCH_ISA_A64
5915 __Int32x2_t a = {0, 1};
5916 __Int32x2_t b = {0, 2};
5919 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
5922 : /* No clobbers. */);
5926 __simd64_int32_t a = {0, 1};
5927 __simd64_int32_t b = {0, 2};
5928 __simd64_int32_t result;
5930 asm ("vqrdmlah.s32 %P0, %P1, %P2"
5933 : /* No clobbers. */);
5938 } [add_options_for_arm_v8_1a_neon ""]]
5941 # Return 1 if the target supports executing floating point instructions from
5942 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
5945 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
5946 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
5949 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
5956 #ifdef __ARM_ARCH_ISA_A64
5958 asm ("fabs %h0, %h1"
5961 : /* No clobbers. */);
5965 asm ("vabs.f16 %0, %1"
5968 : /* No clobbers. */);
5972 return (result == 1.0) ? 0 : 1;
5974 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
5977 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
5978 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
5981 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
5982 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
5985 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
5989 #ifdef __ARM_ARCH_ISA_A64
5991 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
5992 __Float16x4_t result;
5994 asm ("fabs %0.4h, %1.4h"
5997 : /* No clobbers. */);
6001 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
6002 __simd64_float16_t result;
6004 asm ("vabs.f16 %P0, %P1"
6007 : /* No clobbers. */);
6011 return (result[0] == 1.0) ? 0 : 1;
6013 } [add_options_for_arm_v8_2a_fp16_neon ""]]
6016 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
6017 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
6020 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
6021 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
6024 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
6025 #include "arm_neon.h"
6030 uint32x2_t results = {0,0};
6031 uint8x8_t a = {1,1,1,1,2,2,2,2};
6032 uint8x8_t b = {2,2,2,2,3,3,3,3};
6034 #ifdef __ARM_ARCH_ISA_A64
6035 asm ("udot %0.2s, %1.8b, %2.8b"
6038 : /* No clobbers. */);
6041 asm ("vudot.u8 %P0, %P1, %P2"
6044 : /* No clobbers. */);
6047 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
6049 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
6052 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
6053 # with the i8mm extension, 0 otherwise. The test is valid for ARM and for
6056 proc check_effective_target_arm_v8_2a_i8mm_neon_hw { } {
6057 if { ![check_effective_target_arm_v8_2a_i8mm_ok] } {
6060 return [check_runtime arm_v8_2a_i8mm_neon_hw_available {
6061 #include "arm_neon.h"
6066 uint32x2_t results = {0,0};
6067 uint8x8_t a = {1,1,1,1,2,2,2,2};
6068 int8x8_t b = {2,2,2,2,3,3,3,3};
6070 #ifdef __ARM_ARCH_ISA_A64
6071 asm ("usdot %0.2s, %1.8b, %2.8b"
6074 : /* No clobbers. */);
6077 asm ("vusdot.u8 %P0, %P1, %P2"
6080 : /* No clobbers. */);
6083 return (vget_lane_u32 (results, 0) == 8
6084 && vget_lane_u32 (results, 1) == 24) ? 1 : 0;
6086 } [add_options_for_arm_v8_2a_i8mm ""]]
6089 # Return 1 if this is a ARM target with NEON enabled.
6091 proc check_effective_target_arm_neon { } {
6092 if { [check_effective_target_arm32] } {
6093 return [check_no_compiler_messages arm_neon object {
6094 #ifndef __ARM_NEON__
6105 proc check_effective_target_arm_neonv2 { } {
6106 if { [check_effective_target_arm32] } {
6107 return [check_no_compiler_messages arm_neon object {
6108 #ifndef __ARM_NEON__
6111 #ifndef __ARM_FEATURE_FMA
6123 # Return 1 if this is an ARM target with load acquire and store release
6124 # instructions for 8-, 16- and 32-bit types.
6126 proc check_effective_target_arm_acq_rel { } {
6127 return [check_no_compiler_messages arm_acq_rel object {
6129 load_acquire_store_release (void)
6131 asm ("lda r0, [r1]\n\t"
6137 : : : "r0", "memory");
6142 # Add the options needed for MIPS Paired-Single.
6144 proc add_options_for_mpaired_single { flags } {
6145 if { ! [check_effective_target_mpaired_single "-mpaired-single"] } {
6148 return "$flags -mpaired-single"
6151 # Add the options needed for MIPS SIMD Architecture.
6153 proc add_options_for_mips_msa { flags } {
6154 if { ! [check_effective_target_mips_msa "-mmsa"] } {
6157 return "$flags -mmsa"
6160 # Add the options needed for MIPS Loongson MMI Architecture.
6162 proc add_options_for_mips_loongson_mmi { flags } {
6163 if { ! [check_effective_target_mips_loongson_mmi "-mloongson-mmi"] } {
6166 return "$flags -mloongson-mmi"
6170 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
6171 # the Loongson vector modes.
6173 proc check_effective_target_mips_loongson_mmi { args } {
6174 return [check_no_compiler_messages loongson assembly {
6175 #if !defined(__mips_loongson_mmi)
6176 #error !__mips_loongson_mmi
6178 #if !defined(__mips_loongson_vector_rev)
6179 #error !__mips_loongson_vector_rev
6184 # Return 1 if this is a MIPS target that supports the legacy NAN.
6186 proc check_effective_target_mips_nanlegacy { } {
6187 return [check_no_compiler_messages nanlegacy assembly {
6189 int main () { return 0; }
6193 # Return 1 if an MSA program can be compiled to object
6195 proc check_effective_target_mips_msa { args } {
6196 if ![check_effective_target_nomips16] {
6199 return [check_no_compiler_messages msa object {
6200 #if !defined(__mips_msa)
6201 #error "MSA NOT AVAIL"
6203 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
6204 #error "MSA NOT AVAIL FOR ISA REV < 2"
6206 #if !defined(__mips_hard_float)
6207 #error "MSA HARD_FLOAT REQUIRED"
6209 #if __mips_fpr != 64
6210 #error "MSA 64-bit FPR REQUIRED"
6216 v8i16 v = __builtin_msa_ldi_h (1);
6224 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
6227 proc check_effective_target_arm_eabi { } {
6228 return [check_no_compiler_messages arm_eabi object {
6229 #ifndef __ARM_EABI__
6237 # Return 1 if this is an ARM target that adheres to the hard-float variant of
6238 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
6240 proc check_effective_target_arm_hf_eabi { } {
6241 return [check_no_compiler_messages arm_hf_eabi object {
6242 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
6243 #error not hard-float EABI
6250 # Return 1 if this is an ARM target uses emulated floating point
6253 proc check_effective_target_arm_softfloat { } {
6254 return [check_no_compiler_messages arm_softfloat object {
6255 #if !defined(__SOFTFP__)
6256 #error not soft-float EABI
6263 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
6264 # Some multilibs may be incompatible with this option.
6266 proc check_effective_target_arm_iwmmxt_ok { } {
6267 if { [check_effective_target_arm32] } {
6268 return [check_no_compiler_messages arm_iwmmxt_ok object {
6276 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
6277 # for an ARM target.
6278 proc check_effective_target_arm_prefer_ldrd_strd { } {
6279 if { ![check_effective_target_arm32] } {
6283 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
6284 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
6288 # Return true if LDRD/STRD instructions are available on this target.
6289 proc check_effective_target_arm_ldrd_strd_ok { } {
6290 if { ![check_effective_target_arm32] } {
6294 return [check_no_compiler_messages arm_ldrd_strd_ok object {
6297 __UINT64_TYPE__ a = 1, b = 10;
6298 __UINT64_TYPE__ *c = &b;
6299 // `a` will be in a valid register since it's a DImode quantity.
6308 # Return 1 if this is a PowerPC target supporting -meabi.
6310 proc check_effective_target_powerpc_eabi_ok { } {
6311 if { [istarget powerpc*-*-*] } {
6312 return [check_no_compiler_messages powerpc_eabi_ok object {
6320 # Return 1 if this is a PowerPC target with floating-point registers.
6322 proc check_effective_target_powerpc_fprs { } {
6323 if { [istarget powerpc*-*-*]
6324 || [istarget rs6000-*-*] } {
6325 return [check_no_compiler_messages powerpc_fprs object {
6337 # Return 1 if this is a PowerPC target with hardware double-precision
6340 proc check_effective_target_powerpc_hard_double { } {
6341 if { [istarget powerpc*-*-*]
6342 || [istarget rs6000-*-*] } {
6343 return [check_no_compiler_messages powerpc_hard_double object {
6355 # Return 1 if this is a PowerPC target with hardware floating point sqrt.
6357 proc check_effective_target_powerpc_sqrt { } {
6358 # We need to be PowerPC, and we need to have hardware fp enabled.
6359 if {![check_effective_target_powerpc_fprs]} {
6363 return [check_no_compiler_messages powerpc_sqrt object {
6367 #error _ARCH_PPCSQ is not defined
6373 # Return 1 if this is a PowerPC target supporting -maltivec.
6375 proc check_effective_target_powerpc_altivec_ok { } {
6376 # Not PowerPC, then not ok
6377 if { !([istarget powerpc*-*-*] || [istarget rs6000-*-*]) } { return 0 }
6379 # Paired Single, then not ok
6380 if { [istarget powerpc-*-linux*paired*] } { return 0 }
6382 # AltiVec is not supported on AIX before 5.3.
6383 if { [istarget powerpc*-*-aix4*]
6384 || [istarget powerpc*-*-aix5.1*]
6385 || [istarget powerpc*-*-aix5.2*] } { return 0 }
6387 # Return true iff compiling with -maltivec does not error.
6388 return [check_no_compiler_messages powerpc_altivec_ok object {
6393 # Return 1 if this is a PowerPC target supporting -mpower8-vector
6395 proc check_effective_target_powerpc_p8vector_ok { } {
6396 if { ([istarget powerpc*-*-*]
6397 && ![istarget powerpc-*-linux*paired*])
6398 || [istarget rs6000-*-*] } {
6399 # AltiVec is not supported on AIX before 5.3.
6400 if { [istarget powerpc*-*-aix4*]
6401 || [istarget powerpc*-*-aix5.1*]
6402 || [istarget powerpc*-*-aix5.2*] } {
6405 # Darwin doesn't run on power8, so far.
6406 if { [istarget *-*-darwin*] } {
6409 return [check_no_compiler_messages powerpc_p8vector_ok object {
6411 asm volatile ("xxlorc 0,0,0");
6414 } "-mpower8-vector"]
6420 # Return 1 if this is a PowerPC target supporting -mpower9-vector
6422 proc check_effective_target_powerpc_p9vector_ok { } {
6423 if { ([istarget powerpc*-*-*]
6424 && ![istarget powerpc-*-linux*paired*])
6425 || [istarget rs6000-*-*] } {
6426 # AltiVec is not supported on AIX before 5.3.
6427 if { [istarget powerpc*-*-aix4*]
6428 || [istarget powerpc*-*-aix5.1*]
6429 || [istarget powerpc*-*-aix5.2*] } {
6432 # Darwin doesn't run on power9, so far.
6433 if { [istarget *-*-darwin*] } {
6436 return [check_no_compiler_messages powerpc_p9vector_ok object {
6439 vector double v = (vector double) { 0.0, 0.0 };
6440 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
6443 } "-mpower9-vector"]
6449 # Return 1 if this is a PowerPC target supporting -mmodulo
6451 proc check_effective_target_powerpc_p9modulo_ok { } {
6452 if { ([istarget powerpc*-*-*]
6453 && ![istarget powerpc-*-linux*paired*])
6454 || [istarget rs6000-*-*] } {
6455 # AltiVec is not supported on AIX before 5.3.
6456 if { [istarget powerpc*-*-aix4*]
6457 || [istarget powerpc*-*-aix5.1*]
6458 || [istarget powerpc*-*-aix5.2*] } {
6461 return [check_no_compiler_messages powerpc_p9modulo_ok object {
6463 int i = 5, j = 3, r = -1;
6464 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
6473 # return 1 if our compiler returns the ARCH_PWR defines with the options
6474 # as provided by the test.
6475 proc check_effective_target_has_arch_pwr5 { } {
6476 return [check_no_compiler_messages_nocache arch_pwr5 assembly {
6480 #error does not have power5 support.
6482 /* "has power5 support" */
6485 } [current_compiler_flags]]
6488 proc check_effective_target_has_arch_pwr6 { } {
6489 return [check_no_compiler_messages_nocache arch_pwr6 assembly {
6493 #error does not have power6 support.
6495 /* "has power6 support" */
6498 } [current_compiler_flags]]
6501 proc check_effective_target_has_arch_pwr7 { } {
6502 return [check_no_compiler_messages_nocache arch_pwr7 assembly {
6506 #error does not have power7 support.
6508 /* "has power7 support" */
6511 } [current_compiler_flags]]
6514 proc check_effective_target_has_arch_pwr8 { } {
6515 return [check_no_compiler_messages_nocache arch_pwr8 assembly {
6519 #error does not have power8 support.
6521 /* "has power8 support" */
6524 } [current_compiler_flags]]
6527 proc check_effective_target_has_arch_pwr9 { } {
6528 return [check_no_compiler_messages_nocache arch_pwr9 assembly {
6532 #error does not have power9 support.
6534 /* "has power9 support" */
6537 } [current_compiler_flags]]
6540 proc check_effective_target_has_arch_pwr10 { } {
6541 return [check_no_compiler_messages_nocache arch_pwr10 assembly {
6545 #error does not have power10 support.
6547 /* "has power10 support" */
6550 } [current_compiler_flags]]
6553 proc check_effective_target_has_arch_ppc64 { } {
6554 return [check_no_compiler_messages_nocache arch_ppc64 assembly {
6558 #error does not have ppc64 support.
6560 /* "has ppc64 support" */
6563 } [current_compiler_flags]]
6566 # Return 1 if this is a PowerPC target supporting -mcpu=power10.
6567 # Limit this to 64-bit linux systems for now until other targets support
6570 proc check_effective_target_power10_ok { } {
6571 if { ([istarget powerpc64*-*-linux*]) } {
6572 return [check_no_compiler_messages power10_ok object {
6575 asm ("pli %0,%1" : "=r" (e) : "n" (0x12345));
6584 # Return 1 if this is a PowerPC target supporting -mcpu=future or -mdense-math
6585 # which enables the dense math operations.
6586 proc check_effective_target_powerpc_dense_math_ok { } {
6587 return [check_no_compiler_messages_nocache powerpc_dense_math_ok assembly {
6592 #error "target does not have dense math support."
6594 /* Make sure we have dense math support. */
6596 __asm__ ("dmsetaccz %A0" : "=wD" (dmr));
6603 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
6604 # software emulation on power7/power8 systems or hardware support on power9.
6606 proc check_effective_target_powerpc_float128_sw_ok { } {
6607 if { ([istarget powerpc*-*-*]
6608 && ![istarget powerpc-*-linux*paired*])
6609 || [istarget rs6000-*-*] } {
6610 # AltiVec is not supported on AIX before 5.3.
6611 if { [istarget powerpc*-*-aix4*]
6612 || [istarget powerpc*-*-aix5.1*]
6613 || [istarget powerpc*-*-aix5.2*] } {
6616 # Darwin doesn't have VSX, so no soft support for float128.
6617 if { [istarget *-*-darwin*] } {
6620 return [check_no_compiler_messages powerpc_float128_sw_ok object {
6621 volatile __float128 x = 1.0q;
6622 volatile __float128 y = 2.0q;
6624 __float128 z = x + y;
6627 } "-mfloat128 -mvsx"]
6633 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
6634 # support on power9.
6636 proc check_effective_target_powerpc_float128_hw_ok { } {
6637 if { ([istarget powerpc*-*-*]
6638 && ![istarget powerpc-*-linux*paired*])
6639 || [istarget rs6000-*-*] } {
6640 # AltiVec is not supported on AIX before 5.3.
6641 if { [istarget powerpc*-*-aix4*]
6642 || [istarget powerpc*-*-aix5.1*]
6643 || [istarget powerpc*-*-aix5.2*] } {
6646 # Darwin doesn't run on any machine with float128 h/w so far.
6647 if { [istarget *-*-darwin*] } {
6650 return [check_no_compiler_messages powerpc_float128_hw_ok object {
6651 volatile __float128 x = 1.0q;
6652 volatile __float128 y = 2.0q;
6655 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
6658 } "-mfloat128-hardware"]
6664 # Return 1 if current options define float128, 0 otherwise.
6666 proc check_effective_target_ppc_float128 { } {
6667 return [check_no_compiler_messages_nocache ppc_float128 object {
6670 #ifndef __FLOAT128__
6677 # Return 1 if current options generate float128 insns, 0 otherwise.
6679 proc check_effective_target_ppc_float128_insns { } {
6680 return [check_no_compiler_messages_nocache ppc_float128 object {
6683 #ifndef __FLOAT128_HARDWARE__
6690 # Return 1 if current options generate VSX instructions, 0 otherwise.
6692 proc check_effective_target_powerpc_vsx { } {
6693 return [check_no_compiler_messages_nocache powerpc_vsx object {
6703 # Return 1 if this is a PowerPC target supporting -mvsx
6705 proc check_effective_target_powerpc_vsx_ok { } {
6706 if { ([istarget powerpc*-*-*]
6707 && ![istarget powerpc-*-linux*paired*])
6708 || [istarget rs6000-*-*] } {
6709 # VSX is not supported on AIX before 7.1.
6710 if { [istarget powerpc*-*-aix4*]
6711 || [istarget powerpc*-*-aix5*]
6712 || [istarget powerpc*-*-aix6*] } {
6715 # Darwin doesn't have VSX, even if it's used with an assembler
6716 #Â which recognises the insns.
6717 if { [istarget *-*-darwin*] } {
6720 return [check_no_compiler_messages powerpc_vsx_ok object {
6722 asm volatile ("xxlor 0,0,0");
6731 # Return 1 if this is a PowerPC target supporting -mhtm
6733 proc check_effective_target_powerpc_htm_ok { } {
6734 if { ([istarget powerpc*-*-*]
6735 && ![istarget powerpc-*-linux*paired*])
6736 || [istarget rs6000-*-*] } {
6737 # HTM is not supported on AIX yet.
6738 if { [istarget powerpc*-*-aix*] } {
6741 return [check_no_compiler_messages powerpc_htm_ok object {
6743 asm volatile ("tbegin. 0");
6752 # Return 1 if the target supports executing HTM hardware instructions,
6753 # 0 otherwise. Cache the result.
6755 proc check_htm_hw_available { } {
6756 return [check_cached_effective_target htm_hw_available {
6757 # For now, disable on Darwin
6758 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
6761 check_runtime_nocache htm_hw_available {
6771 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
6773 proc check_effective_target_powerpc_ppu_ok { } {
6774 if [check_effective_target_powerpc_altivec_ok] {
6775 return [check_no_compiler_messages cell_asm_available object {
6778 asm volatile ("lvlx v0,v0,v0");
6780 asm volatile ("lvlx 0,0,0");
6790 # Return 1 if this is a PowerPC target that supports SPU.
6792 proc check_effective_target_powerpc_spu { } {
6793 if { [istarget powerpc*-*-linux*] } {
6794 return [check_effective_target_powerpc_altivec_ok]
6800 # Return 1 if this is a PowerPC SPE target. The check includes options
6801 # specified by dg-options for this test, so don't cache the result.
6803 proc check_effective_target_powerpc_spe_nocache { } {
6804 if { [istarget powerpc*-*-*] } {
6805 return [check_no_compiler_messages_nocache powerpc_spe object {
6811 } [current_compiler_flags]]
6817 # Return 1 if this is a PowerPC target with SPE enabled.
6819 proc check_effective_target_powerpc_spe { } {
6820 if { [istarget powerpc*-*-*] } {
6821 return [check_no_compiler_messages powerpc_spe object {
6833 # Return 1 if this is a PowerPC target with Altivec enabled.
6835 proc check_effective_target_powerpc_altivec { } {
6836 if { [istarget powerpc*-*-*] } {
6837 return [check_no_compiler_messages powerpc_altivec object {
6849 # Return 1 if this is a PowerPC 405 target. The check includes options
6850 # specified by dg-options for this test, so don't cache the result.
6852 proc check_effective_target_powerpc_405_nocache { } {
6853 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
6854 return [check_no_compiler_messages_nocache powerpc_405 object {
6860 } [current_compiler_flags]]
6866 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
6868 proc check_effective_target_powerpc_elfv2 { } {
6869 if { [istarget powerpc*-*-*] } {
6870 return [check_no_compiler_messages powerpc_elfv2 object {
6872 #error not ELF v2 ABI
6882 # Return 1 if this is a PowerPC target supporting -mrop-protect
6884 proc check_effective_target_rop_ok { } {
6885 return [check_effective_target_power10_ok] && [check_effective_target_powerpc_elfv2]
6888 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
6889 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
6890 # test environment appears to run executables on such a simulator.
6892 proc check_effective_target_ultrasparc_hw { } {
6893 return [check_runtime ultrasparc_hw {
6894 int main() { return 0; }
6895 } "-mcpu=ultrasparc"]
6898 # Return 1 if the test environment supports executing UltraSPARC VIS2
6899 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
6901 proc check_effective_target_ultrasparc_vis2_hw { } {
6902 return [check_runtime ultrasparc_vis2_hw {
6903 int main() { __asm__(".word 0x81b00320"); return 0; }
6904 } "-mcpu=ultrasparc3"]
6907 # Return 1 if the test environment supports executing UltraSPARC VIS3
6908 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
6910 proc check_effective_target_ultrasparc_vis3_hw { } {
6911 return [check_runtime ultrasparc_vis3_hw {
6912 int main() { __asm__(".word 0x81b00220"); return 0; }
6916 # Return 1 if this is a SPARC-V9 target.
6918 proc check_effective_target_sparc_v9 { } {
6919 if { [istarget sparc*-*-*] } {
6920 return [check_no_compiler_messages sparc_v9 object {
6922 asm volatile ("return %i7+8");
6931 # Return 1 if this is a SPARC target with VIS enabled.
6933 proc check_effective_target_sparc_vis { } {
6934 if { [istarget sparc*-*-*] } {
6935 return [check_no_compiler_messages sparc_vis object {
6947 # Return 1 if the target supports hardware vector shift operation.
6949 proc check_effective_target_vect_shift { } {
6950 return [check_cached_effective_target_indexed vect_shift {
6951 expr {([istarget powerpc*-*-*]
6952 && ![istarget powerpc-*-linux*paired*])
6953 || [istarget ia64-*-*]
6954 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6955 || [istarget aarch64*-*-*]
6956 || [is-effective-target arm_neon]
6957 || ([istarget mips*-*-*]
6958 && ([et-is-effective-target mips_msa]
6959 || [et-is-effective-target mips_loongson_mmi]))
6960 || ([istarget s390*-*-*]
6961 && [check_effective_target_s390_vx])
6962 || [istarget amdgcn-*-*] }}]
6965 # Return 1 if the target supports hardware vector shift by register operation.
6967 proc check_effective_target_vect_var_shift { } {
6968 return [check_cached_effective_target_indexed vect_var_shift {
6969 expr {(([istarget i?86-*-*] || [istarget x86_64-*-*])
6970 && [check_avx2_available])
6971 || [istarget aarch64*-*-*]
6975 proc check_effective_target_whole_vector_shift { } {
6976 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6977 || [istarget ia64-*-*]
6978 || [istarget aarch64*-*-*]
6979 || [istarget powerpc64*-*-*]
6980 || ([is-effective-target arm_neon]
6981 && [check_effective_target_arm_little_endian])
6982 || ([istarget mips*-*-*]
6983 && [et-is-effective-target mips_loongson_mmi])
6984 || ([istarget s390*-*-*]
6985 && [check_effective_target_s390_vx])
6986 || [istarget amdgcn-*-*] } {
6992 verbose "check_effective_target_vect_long: returning $answer" 2
6996 # Return 1 if the target supports vector bswap operations.
6998 proc check_effective_target_vect_bswap { } {
6999 return [check_cached_effective_target_indexed vect_bswap {
7000 expr { [istarget aarch64*-*-*]
7001 || [is-effective-target arm_neon]
7002 || [istarget amdgcn-*-*] }}]
7005 # Return 1 if the target supports comparison of bool vectors for at
7006 # least one vector length.
7008 proc check_effective_target_vect_bool_cmp { } {
7009 return [check_cached_effective_target_indexed vect_bool_cmp {
7010 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7011 || [istarget aarch64*-*-*]
7012 || [is-effective-target arm_neon] }}]
7015 # Return 1 if the target supports addition of char vectors for at least
7016 # one vector length.
7018 proc check_effective_target_vect_char_add { } {
7019 return [check_cached_effective_target_indexed vect_char_add {
7021 [istarget i?86-*-*] || [istarget x86_64-*-*]
7022 || ([istarget powerpc*-*-*]
7023 && ![istarget powerpc-*-linux*paired*])
7024 || [istarget amdgcn-*-*]
7025 || [istarget ia64-*-*]
7026 || [istarget aarch64*-*-*]
7027 || [is-effective-target arm_neon]
7028 || ([istarget mips*-*-*]
7029 && ([et-is-effective-target mips_loongson_mmi]
7030 || [et-is-effective-target mips_msa]))
7031 || ([istarget s390*-*-*]
7032 && [check_effective_target_s390_vx])
7036 # Return 1 if the target supports hardware vector shift operation for char.
7038 proc check_effective_target_vect_shift_char { } {
7039 return [check_cached_effective_target_indexed vect_shift_char {
7040 expr { ([istarget powerpc*-*-*]
7041 && ![istarget powerpc-*-linux*paired*])
7042 || [is-effective-target arm_neon]
7043 || ([istarget mips*-*-*]
7044 && [et-is-effective-target mips_msa])
7045 || ([istarget s390*-*-*]
7046 && [check_effective_target_s390_vx])
7047 || [istarget amdgcn-*-*] }}]
7050 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
7052 # This can change for different subtargets so do not cache the result.
7054 proc check_effective_target_vect_long { } {
7055 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
7056 || (([istarget powerpc*-*-*]
7057 && ![istarget powerpc-*-linux*paired*])
7058 && [check_effective_target_ilp32])
7059 || [is-effective-target arm_neon]
7060 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
7061 || [istarget aarch64*-*-*]
7062 || ([istarget mips*-*-*]
7063 && [et-is-effective-target mips_msa])
7064 || ([istarget s390*-*-*]
7065 && [check_effective_target_s390_vx])
7066 || [istarget amdgcn-*-*] } {
7072 verbose "check_effective_target_vect_long: returning $answer" 2
7076 # Return 1 if the target supports hardware vectors of float when
7077 # -funsafe-math-optimizations is enabled, 0 otherwise.
7079 # This won't change for different subtargets so cache the result.
7081 proc check_effective_target_vect_float { } {
7082 return [check_cached_effective_target_indexed vect_float {
7083 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7084 || [istarget powerpc*-*-*]
7085 || [istarget mips-sde-elf]
7086 || [istarget mipsisa64*-*-*]
7087 || [istarget ia64-*-*]
7088 || [istarget aarch64*-*-*]
7089 || ([istarget mips*-*-*]
7090 && [et-is-effective-target mips_msa])
7091 || [is-effective-target arm_neon]
7092 || ([istarget s390*-*-*]
7093 && [check_effective_target_s390_vxe])
7094 || [istarget amdgcn-*-*] }}]
7097 # Return 1 if the target supports hardware vectors of float without
7098 # -funsafe-math-optimizations being enabled, 0 otherwise.
7100 proc check_effective_target_vect_float_strict { } {
7101 return [expr { [check_effective_target_vect_float]
7102 && ![istarget arm*-*-*] }]
7105 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
7107 # This won't change for different subtargets so cache the result.
7109 proc check_effective_target_vect_double { } {
7110 return [check_cached_effective_target_indexed vect_double {
7111 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
7112 && [check_no_compiler_messages vect_double assembly {
7113 #ifdef __tune_atom__
7114 # error No double vectorizer support.
7117 || [istarget aarch64*-*-*]
7118 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
7119 || ([istarget mips*-*-*]
7120 && [et-is-effective-target mips_msa])
7121 || ([istarget s390*-*-*]
7122 && [check_effective_target_s390_vx])
7123 || [istarget amdgcn-*-*]} }]
7126 # Return 1 if the target supports conditional addition, subtraction,
7127 # multiplication, division, minimum and maximum on vectors of double,
7128 # via the cond_ optabs. Return 0 otherwise.
7130 proc check_effective_target_vect_double_cond_arith { } {
7131 return [check_effective_target_aarch64_sve]
7134 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
7136 # This won't change for different subtargets so cache the result.
7138 proc check_effective_target_vect_long_long { } {
7139 return [check_cached_effective_target_indexed vect_long_long {
7140 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7141 || ([istarget mips*-*-*]
7142 && [et-is-effective-target mips_msa])
7143 || ([istarget s390*-*-*]
7144 && [check_effective_target_s390_vx])
7145 || ([istarget powerpc*-*-*]
7146 && ![istarget powerpc-*-linux*paired*]
7147 && [check_effective_target_has_arch_pwr8])
7148 || [istarget aarch64*-*-*] }}]
7152 # Return 1 if the target plus current options does not support a vector
7153 # max instruction on "int", 0 otherwise.
7155 # This won't change for different subtargets so cache the result.
7157 proc check_effective_target_vect_no_int_min_max { } {
7158 return [check_cached_effective_target_indexed vect_no_int_min_max {
7159 expr { [istarget sparc*-*-*]
7160 || [istarget alpha*-*-*]
7161 || ([istarget mips*-*-*]
7162 && [et-is-effective-target mips_loongson_mmi]) }}]
7165 # Return 1 if the target plus current options does not support a vector
7166 # add instruction on "int", 0 otherwise.
7168 # This won't change for different subtargets so cache the result.
7170 proc check_effective_target_vect_no_int_add { } {
7171 # Alpha only supports vector add on V8QI and V4HI.
7172 return [check_cached_effective_target_indexed vect_no_int_add {
7173 expr { [istarget alpha*-*-*] }}]
7176 # Return 1 if the target plus current options does not support vector
7177 # bitwise instructions, 0 otherwise.
7179 # This won't change for different subtargets so cache the result.
7181 proc check_effective_target_vect_no_bitwise { } {
7182 return [check_cached_effective_target_indexed vect_no_bitwise { return 0 }]
7185 # Return 1 if the target plus current options supports vector permutation,
7188 # This won't change for different subtargets so cache the result.
7190 proc check_effective_target_vect_perm { } {
7191 return [check_cached_effective_target_indexed vect_perm {
7192 expr { [is-effective-target arm_neon]
7193 || [istarget aarch64*-*-*]
7194 || [istarget powerpc*-*-*]
7195 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7196 || ([istarget mips*-*-*]
7197 && ([et-is-effective-target mpaired_single]
7198 || [et-is-effective-target mips_msa]))
7199 || ([istarget s390*-*-*]
7200 && [check_effective_target_s390_vx])
7201 || [istarget amdgcn-*-*] }}]
7204 # Return 1 if, for some VF:
7206 # - the target's default vector size is VF * ELEMENT_BITS bits
7208 # - it is possible to implement the equivalent of:
7210 # int<ELEMENT_BITS>_t s1[COUNT][COUNT * VF], s2[COUNT * VF];
7211 # for (int i = 0; i < COUNT; ++i)
7212 # for (int j = 0; j < COUNT * VF; ++j)
7213 # s1[i][j] = s2[j - j % COUNT + i]
7215 # using only a single 2-vector permute for each vector in s1.
7217 # E.g. for COUNT == 3 and vector length 4, the two arrays would be:
7219 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
7220 # ------+-------------+-------------+------------
7221 # s1[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
7222 # s1[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
7223 # s1[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
7225 # Each s1 permute requires only two of a, b and c.
7227 # The distance between the start of vector n in s1[0] and the start
7228 # of vector n in s2 is:
7230 # A = (n * VF) % COUNT
7232 # The corresponding value for the end of vector n is:
7234 # B = (n * VF + VF - 1) % COUNT
7236 # Subtracting i from each value gives the corresponding difference
7237 # for s1[i]. The condition being tested by this function is false
7238 # iff A - i > 0 and B - i < 0 for some i and n, such that the first
7239 # element for s1[i] comes from vector n - 1 of s2 and the last element
7240 # comes from vector n + 1 of s2. The condition is therefore true iff
7241 # A <= B for all n. This is turn means the condition is true iff:
7243 # (n * VF) % COUNT + (VF - 1) % COUNT < COUNT
7245 # for all n. COUNT - (n * VF) % COUNT is bounded by gcd (VF, COUNT),
7246 # and will be that value for at least one n in [0, COUNT), so we want:
7248 # (VF - 1) % COUNT < gcd (VF, COUNT)
7250 proc vect_perm_supported { count element_bits } {
7251 set vector_bits [lindex [available_vector_sizes] 0]
7252 # The number of vectors has to be a power of 2 when permuting
7253 # variable-length vectors.
7254 if { $vector_bits <= 0 && ($count & -$count) != $count } {
7257 set vf [expr { $vector_bits / $element_bits }]
7259 # Compute gcd (VF, COUNT).
7262 while { $temp1 > 0 } {
7263 set temp2 [expr { $gcd % $temp1 }]
7267 return [expr { ($vf - 1) % $count < $gcd }]
7270 # Return 1 if the target supports SLP permutation of 3 vectors when each
7271 # element has 32 bits.
7273 proc check_effective_target_vect_perm3_int { } {
7274 return [expr { [check_effective_target_vect_perm]
7275 && [vect_perm_supported 3 32] }]
7278 # Return 1 if the target plus current options supports vector permutation
7279 # on byte-sized elements, 0 otherwise.
7281 # This won't change for different subtargets so cache the result.
7283 proc check_effective_target_vect_perm_byte { } {
7284 return [check_cached_effective_target_indexed vect_perm_byte {
7285 expr { ([is-effective-target arm_neon]
7286 && [is-effective-target arm_little_endian])
7287 || ([istarget aarch64*-*-*]
7288 && [is-effective-target aarch64_little_endian])
7289 || [istarget powerpc*-*-*]
7290 || ([istarget mips-*.*]
7291 && [et-is-effective-target mips_msa])
7292 || ([istarget s390*-*-*]
7293 && [check_effective_target_s390_vx])
7294 || [istarget amdgcn-*-*] }}]
7297 # Return 1 if the target supports SLP permutation of 3 vectors when each
7298 # element has 8 bits.
7300 proc check_effective_target_vect_perm3_byte { } {
7301 return [expr { [check_effective_target_vect_perm_byte]
7302 && [vect_perm_supported 3 8] }]
7305 # Return 1 if the target plus current options supports vector permutation
7306 # on short-sized elements, 0 otherwise.
7308 # This won't change for different subtargets so cache the result.
7310 proc check_effective_target_vect_perm_short { } {
7311 return [check_cached_effective_target_indexed vect_perm_short {
7312 expr { ([is-effective-target arm_neon]
7313 && [is-effective-target arm_little_endian])
7314 || ([istarget aarch64*-*-*]
7315 && [is-effective-target aarch64_little_endian])
7316 || [istarget powerpc*-*-*]
7317 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
7318 && [check_ssse3_available])
7319 || ([istarget mips*-*-*]
7320 && [et-is-effective-target mips_msa])
7321 || ([istarget s390*-*-*]
7322 && [check_effective_target_s390_vx])
7323 || [istarget amdgcn-*-*] }}]
7326 # Return 1 if the target supports SLP permutation of 3 vectors when each
7327 # element has 16 bits.
7329 proc check_effective_target_vect_perm3_short { } {
7330 return [expr { [check_effective_target_vect_perm_short]
7331 && [vect_perm_supported 3 16] }]
7334 # Return 1 if the target plus current options supports folding of
7335 # copysign into XORSIGN.
7337 # This won't change for different subtargets so cache the result.
7339 proc check_effective_target_xorsign { } {
7340 return [check_cached_effective_target_indexed xorsign {
7341 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7342 || [istarget aarch64*-*-*] || [istarget arm*-*-*] }}]
7345 # Return 1 if the target plus current options supports a vector
7346 # widening summation of *short* args into *int* result, 0 otherwise.
7348 # This won't change for different subtargets so cache the result.
7350 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
7351 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si_pattern {
7352 expr { [istarget powerpc*-*-*]
7353 || ([istarget aarch64*-*-*]
7354 && ![check_effective_target_aarch64_sve])
7355 || [is-effective-target arm_neon]
7356 || [istarget ia64-*-*] }}]
7359 # Return 1 if the target plus current options supports a vector
7360 # widening summation of *short* args into *int* result, 0 otherwise.
7361 # A target can also support this widening summation if it can support
7362 # promotion (unpacking) from shorts to ints.
7364 # This won't change for different subtargets so cache the result.
7366 proc check_effective_target_vect_widen_sum_hi_to_si { } {
7367 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si {
7368 expr { [check_effective_target_vect_unpack]
7369 || [istarget powerpc*-*-*]
7370 || [istarget ia64-*-*] }}]
7373 # Return 1 if the target plus current options supports a vector
7374 # widening summation of *char* args into *short* result, 0 otherwise.
7375 # A target can also support this widening summation if it can support
7376 # promotion (unpacking) from chars to shorts.
7378 # This won't change for different subtargets so cache the result.
7380 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
7381 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_hi {
7382 expr { [check_effective_target_vect_unpack]
7383 || [is-effective-target arm_neon]
7384 || [istarget ia64-*-*] }}]
7387 # Return 1 if the target plus current options supports a vector
7388 # widening summation of *char* args into *int* result, 0 otherwise.
7390 # This won't change for different subtargets so cache the result.
7392 proc check_effective_target_vect_widen_sum_qi_to_si { } {
7393 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_si {
7394 expr { [istarget powerpc*-*-*] }}]
7397 # Return 1 if the target plus current options supports a vector
7398 # widening multiplication of *char* args into *short* result, 0 otherwise.
7399 # A target can also support this widening multplication if it can support
7400 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
7401 # multiplication of shorts).
7403 # This won't change for different subtargets so cache the result.
7406 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
7407 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi {
7408 expr { ([check_effective_target_vect_unpack]
7409 && [check_effective_target_vect_short_mult])
7410 || ([istarget powerpc*-*-*]
7411 || ([istarget aarch64*-*-*]
7412 && ![check_effective_target_aarch64_sve])
7413 || [is-effective-target arm_neon]
7414 || ([istarget s390*-*-*]
7415 && [check_effective_target_s390_vx]))
7416 || [istarget amdgcn-*-*] }}]
7419 # Return 1 if the target plus current options supports a vector
7420 # widening multiplication of *short* args into *int* result, 0 otherwise.
7421 # A target can also support this widening multplication if it can support
7422 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
7423 # multiplication of ints).
7425 # This won't change for different subtargets so cache the result.
7428 proc check_effective_target_vect_widen_mult_hi_to_si { } {
7429 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si {
7430 expr { ([check_effective_target_vect_unpack]
7431 && [check_effective_target_vect_int_mult])
7432 || ([istarget powerpc*-*-*]
7433 || [istarget ia64-*-*]
7434 || ([istarget aarch64*-*-*]
7435 && ![check_effective_target_aarch64_sve])
7436 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7437 || [is-effective-target arm_neon]
7438 || ([istarget s390*-*-*]
7439 && [check_effective_target_s390_vx]))
7440 || [istarget amdgcn-*-*] }}]
7443 # Return 1 if the target plus current options supports a vector
7444 # widening multiplication of *char* args into *short* result, 0 otherwise.
7446 # This won't change for different subtargets so cache the result.
7448 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
7449 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi_pattern {
7450 expr { [istarget powerpc*-*-*]
7451 || ([is-effective-target arm_neon]
7452 && [check_effective_target_arm_little_endian])
7453 || ([istarget s390*-*-*]
7454 && [check_effective_target_s390_vx])
7455 || [istarget amdgcn-*-*] }}]
7458 # Return 1 if the target plus current options supports a vector
7459 # widening multiplication of *short* args into *int* result, 0 otherwise.
7461 # This won't change for different subtargets so cache the result.
7463 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
7464 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si_pattern {
7465 expr { [istarget powerpc*-*-*]
7466 || [istarget ia64-*-*]
7467 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7468 || ([is-effective-target arm_neon]
7469 && [check_effective_target_arm_little_endian])
7470 || ([istarget s390*-*-*]
7471 && [check_effective_target_s390_vx])
7472 || [istarget amdgcn-*-*] }}]
7475 # Return 1 if the target plus current options supports a vector
7476 # widening multiplication of *int* args into *long* result, 0 otherwise.
7478 # This won't change for different subtargets so cache the result.
7480 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
7481 return [check_cached_effective_target_indexed vect_widen_mult_si_to_di_pattern {
7482 expr { [istarget ia64-*-*]
7483 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7484 || ([istarget s390*-*-*]
7485 && [check_effective_target_s390_vx]) }}]
7488 # Return 1 if the target plus current options supports a vector
7489 # widening shift, 0 otherwise.
7491 # This won't change for different subtargets so cache the result.
7493 proc check_effective_target_vect_widen_shift { } {
7494 return [check_cached_effective_target_indexed vect_widen_shift {
7495 expr { [is-effective-target arm_neon] }}]
7498 # Return 1 if the target plus current options supports a vector
7499 # dot-product of signed chars, 0 otherwise.
7501 # This won't change for different subtargets so cache the result.
7503 proc check_effective_target_vect_sdot_qi { } {
7504 return [check_cached_effective_target_indexed vect_sdot_qi {
7505 expr { [istarget ia64-*-*]
7506 || [istarget aarch64*-*-*]
7507 || [istarget arm*-*-*]
7508 || ([istarget mips*-*-*]
7509 && [et-is-effective-target mips_msa]) }}]
7512 # Return 1 if the target plus current options supports a vector
7513 # dot-product of unsigned chars, 0 otherwise.
7515 # This won't change for different subtargets so cache the result.
7517 proc check_effective_target_vect_udot_qi { } {
7518 return [check_cached_effective_target_indexed vect_udot_qi {
7519 expr { [istarget powerpc*-*-*]
7520 || [istarget aarch64*-*-*]
7521 || [istarget arm*-*-*]
7522 || [istarget ia64-*-*]
7523 || ([istarget mips*-*-*]
7524 && [et-is-effective-target mips_msa]) }}]
7527 # Return 1 if the target plus current options supports a vector
7528 # dot-product where one operand of the multiply is signed char
7529 # and the other unsigned chars, 0 otherwise.
7531 # This won't change for different subtargets so cache the result.
7533 proc check_effective_target_vect_usdot_qi { } {
7534 return [check_cached_effective_target_indexed vect_usdot_qi {
7535 expr { [istarget aarch64*-*-*]
7536 || [istarget arm*-*-*] }}]
7540 # Return 1 if the target plus current options supports a vector
7541 # dot-product of signed shorts, 0 otherwise.
7543 # This won't change for different subtargets so cache the result.
7545 proc check_effective_target_vect_sdot_hi { } {
7546 return [check_cached_effective_target_indexed vect_sdot_hi {
7547 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
7548 || [istarget ia64-*-*]
7549 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7550 || ([istarget mips*-*-*]
7551 && [et-is-effective-target mips_msa]) }}]
7554 # Return 1 if the target plus current options supports a vector
7555 # dot-product of unsigned shorts, 0 otherwise.
7557 # This won't change for different subtargets so cache the result.
7559 proc check_effective_target_vect_udot_hi { } {
7560 return [check_cached_effective_target_indexed vect_udot_hi {
7561 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
7562 || ([istarget mips*-*-*]
7563 && [et-is-effective-target mips_msa]) }}]
7566 # Return 1 if the target plus current options supports a vector
7567 # sad operation of unsigned chars, 0 otherwise.
7569 # This won't change for different subtargets so cache the result.
7571 proc check_effective_target_vect_usad_char { } {
7572 return [check_cached_effective_target_indexed vect_usad_char {
7573 expr { [istarget i?86-*-*]
7574 || [istarget x86_64-*-*]
7575 || ([istarget aarch64*-*-*]
7576 && ![check_effective_target_aarch64_sve])
7577 || ([istarget powerpc*-*-*]
7578 && [check_p9vector_hw_available])}}]
7581 # Return 1 if the target plus current options supports both signed
7582 # and unsigned average operations on vectors of bytes.
7584 proc check_effective_target_vect_avg_qi {} {
7585 return [expr { [istarget aarch64*-*-*]
7586 && ![check_effective_target_aarch64_sve1_only] }]
7589 # Return 1 if the target plus current options supports both signed
7590 # and unsigned multiply-high-with-round-and-scale operations
7591 # on vectors of half-words.
7593 proc check_effective_target_vect_mulhrs_hi {} {
7594 return [expr { [istarget aarch64*-*-*]
7595 && [check_effective_target_aarch64_sve2] }]
7598 # Return 1 if the target plus current options supports signed division
7599 # by power-of-2 operations on vectors of 4-byte integers.
7601 proc check_effective_target_vect_sdiv_pow2_si {} {
7602 return [expr { [istarget aarch64*-*-*]
7603 && [check_effective_target_aarch64_sve] }]
7606 # Return 1 if the target plus current options supports a vector
7607 # demotion (packing) of shorts (to chars) and ints (to shorts)
7608 # using modulo arithmetic, 0 otherwise.
7610 # This won't change for different subtargets so cache the result.
7612 proc check_effective_target_vect_pack_trunc { } {
7613 return [check_cached_effective_target_indexed vect_pack_trunc {
7614 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
7615 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7616 || [istarget aarch64*-*-*]
7617 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
7618 && [check_effective_target_arm_little_endian])
7619 || ([istarget mips*-*-*]
7620 && [et-is-effective-target mips_msa])
7621 || ([istarget s390*-*-*]
7622 && [check_effective_target_s390_vx])
7623 || [istarget amdgcn*-*-*] }}]
7626 # Return 1 if the target plus current options supports a vector
7627 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
7629 # This won't change for different subtargets so cache the result.
7631 proc check_effective_target_vect_unpack { } {
7632 return [check_cached_effective_target_indexed vect_unpack {
7633 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
7634 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7635 || [istarget ia64-*-*]
7636 || [istarget aarch64*-*-*]
7637 || ([istarget mips*-*-*]
7638 && [et-is-effective-target mips_msa])
7639 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
7640 && [check_effective_target_arm_little_endian])
7641 || ([istarget s390*-*-*]
7642 && [check_effective_target_s390_vx])
7643 || [istarget amdgcn*-*-*] }}]
7646 # Return 1 if the target plus current options does not guarantee
7647 # that its STACK_BOUNDARY is >= the reguired vector alignment.
7649 # This won't change for different subtargets so cache the result.
7651 proc check_effective_target_unaligned_stack { } {
7652 return [check_cached_effective_target_indexed unaligned_stack { expr 0 }]
7655 # Return 1 if the target plus current options does not support a vector
7656 # alignment mechanism, 0 otherwise.
7658 # This won't change for different subtargets so cache the result.
7660 proc check_effective_target_vect_no_align { } {
7661 return [check_cached_effective_target_indexed vect_no_align {
7662 expr { [istarget mipsisa64*-*-*]
7663 || [istarget mips-sde-elf]
7664 || [istarget sparc*-*-*]
7665 || [istarget ia64-*-*]
7666 || [check_effective_target_arm_vect_no_misalign]
7667 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
7668 || ([istarget mips*-*-*]
7669 && [et-is-effective-target mips_loongson_mmi]) }}]
7672 # Return 1 if the target supports a vector misalign access, 0 otherwise.
7674 # This won't change for different subtargets so cache the result.
7676 proc check_effective_target_vect_hw_misalign { } {
7677 return [check_cached_effective_target_indexed vect_hw_misalign {
7678 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
7679 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
7680 || [istarget aarch64*-*-*]
7681 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
7682 || ([istarget s390*-*-*]
7683 && [check_effective_target_s390_vx]) } {
7686 if { [istarget arm*-*-*]
7687 && ![check_effective_target_arm_vect_no_misalign] } {
7695 # Return 1 if arrays are aligned to the vector alignment
7696 # boundary, 0 otherwise.
7698 proc check_effective_target_vect_aligned_arrays { } {
7699 set et_vect_aligned_arrays 0
7700 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
7701 && !([is-effective-target ia32]
7702 || ([check_avx_available] && ![check_prefer_avx128]))) } {
7703 set et_vect_aligned_arrays 1
7706 verbose "check_effective_target_vect_aligned_arrays:\
7707 returning $et_vect_aligned_arrays" 2
7708 return $et_vect_aligned_arrays
7711 # Return 1 if the biggest alignment required by target is 1 * BITS_PER_UNIT.
7712 # In such case the target does not impose any alignment constraints.
7714 proc check_effective_target_no_alignment_constraints { } {
7715 return [check_runtime_nocache no_alignment_constraints {
7719 return __BIGGEST_ALIGNMENT__ == 1 ? 0 : 1;
7724 # Return 1 if types of size 32 bit or less are naturally aligned
7725 # (aligned to their type-size), 0 otherwise.
7727 # This won't change for different subtargets so cache the result.
7729 proc check_effective_target_natural_alignment_32 { } {
7730 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
7731 # FIXME: m68k has -malign-int
7732 return [check_cached_effective_target_indexed natural_alignment_32 {
7733 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
7734 || [istarget avr-*-*]
7735 || [istarget m68k-*-linux*]
7736 || [istarget pru-*-*]
7737 || [istarget stormy16-*-*]
7738 || [istarget rl78-*-*]
7739 || [istarget pdp11-*-*]
7740 || [istarget msp430-*-*]
7741 || [istarget m32c-*-*]
7742 || [istarget cris-*-*] } {
7750 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
7751 # type-size), 0 otherwise.
7753 # This won't change for different subtargets so cache the result.
7755 proc check_effective_target_natural_alignment_64 { } {
7756 return [check_cached_effective_target_indexed natural_alignment_64 {
7757 expr { [is-effective-target natural_alignment_32]
7758 && [is-effective-target lp64] && ![istarget *-*-darwin*] }
7762 # Return 1 if all vector types are naturally aligned (aligned to their
7763 # type-size), 0 otherwise.
7765 proc check_effective_target_vect_natural_alignment { } {
7766 set et_vect_natural_alignment 1
7767 if { [check_effective_target_arm_eabi]
7768 || [istarget nvptx-*-*]
7769 || [istarget s390*-*-*]
7770 || [istarget amdgcn-*-*] } {
7771 set et_vect_natural_alignment 0
7773 verbose "check_effective_target_vect_natural_alignment:\
7774 returning $et_vect_natural_alignment" 2
7775 return $et_vect_natural_alignment
7778 # Return true if the target supports the check_raw_ptrs and check_war_ptrs
7779 # optabs on vectors.
7781 proc check_effective_target_vect_check_ptrs { } {
7782 return [check_effective_target_aarch64_sve2]
7785 # Return true if fully-masked loops are supported.
7787 proc check_effective_target_vect_fully_masked { } {
7788 return [expr { [check_effective_target_aarch64_sve]
7789 || [istarget amdgcn*-*-*] }]
7792 # Return true if the target supports the @code{len_load} and
7793 # @code{len_store} optabs.
7795 proc check_effective_target_vect_len_load_store { } {
7796 return [check_effective_target_has_arch_pwr9]
7799 # Return the value of parameter vect-partial-vector-usage specified for
7800 # target by checking the output of "-Q --help=params". Return zero if
7801 # the desirable pattern isn't found.
7803 proc check_vect_partial_vector_usage { } {
7806 return [check_cached_effective_target vect_partial_vector_usage {
7807 set result [check_compile vect_partial_vector_usage assembly {
7809 } "-Q --help=params" ]
7811 # Get compiler emitted messages and delete generated file.
7812 set lines [lindex $result 0]
7813 set output [lindex $result 1]
7814 remote_file build delete $output
7816 set pattern {=vect-partial-vector-usage=<0,2>\s+([0-2])}
7817 # Capture the usage value to val, set it to zero if not found.
7818 if { ![regexp $pattern $lines whole val] } then {
7826 # Return true if the target supports loop vectorization with partial vectors
7827 # and @code{vect-partial-vector-usage} is set to 1.
7829 proc check_effective_target_vect_partial_vectors_usage_1 { } {
7830 return [expr { ([check_effective_target_vect_fully_masked]
7831 || [check_effective_target_vect_len_load_store])
7832 && [check_vect_partial_vector_usage] == 1 }]
7835 # Return true if the target supports loop vectorization with partial vectors
7836 # and @code{vect-partial-vector-usage} is set to 2.
7838 proc check_effective_target_vect_partial_vectors_usage_2 { } {
7839 return [expr { ([check_effective_target_vect_fully_masked]
7840 || [check_effective_target_vect_len_load_store])
7841 && [check_vect_partial_vector_usage] == 2 }]
7844 # Return true if the target supports loop vectorization with partial vectors
7845 # and @code{vect-partial-vector-usage} is nonzero.
7847 proc check_effective_target_vect_partial_vectors { } {
7848 return [expr { ([check_effective_target_vect_fully_masked]
7849 || [check_effective_target_vect_len_load_store])
7850 && [check_vect_partial_vector_usage] != 0 }]
7853 # Return 1 if the target doesn't prefer any alignment beyond element
7854 # alignment during vectorization.
7856 proc check_effective_target_vect_element_align_preferred { } {
7857 return [expr { [check_effective_target_aarch64_sve]
7858 && [check_effective_target_vect_variable_length] }]
7861 # Return true if vectorization of v2qi/v4qi/v8qi/v16qi/v2hi store is enabed.
7862 # Return zero if the desirable pattern isn't found.
7863 # It's used by Warray-bounds/Wstringop-overflow testcases which are
7864 # regressed by O2 vectorization, refer to PR102697/PR102462/PR102706
7865 proc check_vect_slp_store_usage { pattern macro } {
7868 set result [check_compile slp_aligned_store_usage assembly {
7869 extern void sink (void* );
7870 #define Ac8 (AC8){ 0, 1, 2, 3, 4, 5, 6, 7 }
7871 #define Ac16 (AC16){ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
7873 typedef struct AC16 { char a[16]; } AC16;
7874 extern char a16[16];
7881 typedef struct AC8 { char a[8]; } AC8;
7895 extern void sink (void*);
7899 struct A1 a = { 0, { } };
7916 #define Ac4 (AC4){ 0, 1, 2, 3 }
7917 typedef struct AC4 { char a[4]; } AC4;
7965 *(short*) (b + 2) = 1;
7974 foo4_2 (struct Ax *p)
7980 struct A { int i; };
7981 struct B { int j; struct A a[4]; };
7988 char cbuf2[2 * sizeof (struct C)] = { };
7992 struct C *p = (struct C*)&cbuf2;
7999 struct A { int i; };
8000 struct B { int j; struct A a[2]; };
8007 char cbuf2[2 * sizeof (struct C)] = { };
8011 struct C *p = (struct C*)&cbuf2;
8017 } "-O2 -fopt-info-all -D$macro" ]
8019 # Get compiler emitted messages and delete generated file.
8020 set lines [lindex $result 0]
8021 set output [lindex $result 1]
8022 remote_file build delete $output
8024 # Check pattern exits in lines, set it to zero if not found.
8025 if { [regexp $pattern $lines] } then {
8032 # Return the true if target support vectorization of 2-byte char stores
8033 # with 2-byte aligned address at plain O2.
8034 # NB: This target should be removed after real issues are fixed for
8035 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
8036 # this target since tests in check_vect_slp_store_usage
8037 # is the exact match of relative testcases
8038 proc check_effective_target_vect_slp_v2qi_store_align { } {
8039 set pattern {add new stmt: MEM <vector\(2\) char>}
8040 set macro "TEST_V2QI"
8041 return [check_cached_effective_target vect_slp_v2qi_store_align {
8042 expr [check_vect_slp_store_usage $pattern $macro] }]
8045 # Return the true if target support vectorization of 2-byte char stores
8046 # with unaligned address at plain O2.
8047 proc check_effective_target_vect_slp_v2qi_store_unalign { } {
8048 set pattern {add new stmt: MEM <vector\(2\) char>}
8049 set macro "TEST_V2QI_2"
8050 return [check_cached_effective_target vect_slp_v2qi_store_unalign {
8051 expr [check_vect_slp_store_usage $pattern $macro ] }]
8054 # Return the true if target support vectorization of 4-byte char stores
8055 # with 4-byte aligned address at plain O2.
8056 # NB: This target should be removed after real issues are fixed for
8057 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
8058 # this target since tests in check_vect_slp_store_usage
8059 # is the exact match of relative testcases
8060 proc check_effective_target_vect_slp_v4qi_store_align { } {
8061 set pattern {add new stmt: MEM <vector\(4\) char>}
8062 set macro "TEST_V4QI"
8063 return [check_cached_effective_target vect_slp_v4qi_store_align {
8064 expr [check_vect_slp_store_usage $pattern $macro ] }]
8067 # Return the true if target support vectorization of 4-byte char stores
8068 # with unaligned address at plain O2.
8069 proc check_effective_target_vect_slp_v4qi_store_unalign { } {
8070 set pattern {add new stmt: MEM <vector\(4\) char>}
8071 set macro "TEST_V4QI_2"
8072 return [check_cached_effective_target vect_slp_v4qi_store_unalign {
8073 expr [check_vect_slp_store_usage $pattern $macro ] }]
8076 # Return the true if target support block move for
8077 # 8-byte aligned 4-byte size struct initialization.
8078 proc check_effective_target_struct_4char_block_move { } {
8079 set pattern {not vectorized: more than one data ref in stmt:}
8080 set macro "TEST_V4QI_3"
8081 return [check_cached_effective_target struct_4char_block_move {
8082 expr [check_vect_slp_store_usage $pattern $macro ] }]
8085 # Return the true if target support vectorization of 4-byte char stores
8086 # with unaligned address or store them with a constant pool at plain O2.
8087 proc check_effective_target_vect_slp_v4qi_store_unalign_1 { } {
8088 set pattern {add new stmt: MEM <vector\(4\) char>}
8089 set macro "TEST_V4QI_3"
8090 return [check_cached_effective_target vect_slp_v4qi_store_unalign_1 {
8091 expr { [check_vect_slp_store_usage $pattern $macro ]
8092 || [check_effective_target_struct_4char_block_move] } }]
8095 # Return the true if target support block move for
8096 # 8-byte aligned 8-byte size struct initialization.
8097 proc check_effective_target_struct_8char_block_move { } {
8098 set pattern {not vectorized: more than one data ref in stmt:}
8099 set macro "TEST_V8QI"
8100 return [check_cached_effective_target struct_8char_block_move {
8101 expr [check_vect_slp_store_usage $pattern $macro ] }]
8104 # Return the true if target support vectorization of 8-byte char stores
8105 # with unaligned address or store them with a constant pool at plain O2.
8106 # NB: This target should be removed after real issues are fixed for
8107 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
8108 # this target since tests in check_vect_slp_store_usage
8109 # is the exact match of relative testcases
8110 proc check_effective_target_vect_slp_v8qi_store_unalign_1 { } {
8111 set pattern {add new stmt: MEM <vector\(8\) char>}
8112 set macro "TEST_V8QI"
8113 return [check_cached_effective_target vect_slp_v8qi_store_unalign_1 {
8114 expr { [check_vect_slp_store_usage $pattern $macro ]
8115 || [check_effective_target_struct_8char_block_move] } }]
8118 # Return the true if target support block move for
8119 # 8-byte aligned 16-byte size struct initialization.
8120 proc check_effective_target_struct_16char_block_move { } {
8121 set pattern {not vectorized: more than one data ref in stmt:}
8122 set macro "TEST_V16QI"
8123 return [check_cached_effective_target struct_16char_block_move {
8124 expr [check_vect_slp_store_usage $pattern $macro ] }]
8127 # Return the true if target support vectorization of 16-byte char stores
8128 # with unaligned address or store them with a constant pool at plain O2.
8129 # NB: This target should be removed after real issues are fixed for
8130 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
8131 # this target since tests in check_vect_slp_store_usage
8132 # is the exact match of relative testcases
8133 proc check_effective_target_vect_slp_v16qi_store_unalign_1 { } {
8134 set pattern {add new stmt: MEM <vector\(16\) char>}
8135 set macro "TEST_V16QI"
8136 return [check_cached_effective_target vect_slp_v16qi_store_unalign_1 {
8137 expr { [check_vect_slp_store_usage $pattern $macro ]
8138 || [check_effective_target_struct_16char_block_move] } }]
8141 # Return the true if target support vectorization of 4-byte short stores
8142 # with unaligned address at plain O2.
8143 # NB: This target should be removed after real issues are fixed for
8144 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
8145 # this target since tests in check_vect_slp_store_usage
8146 # is the exact match of relative testcases
8147 proc check_effective_target_vect_slp_v2hi_store_unalign { } {
8148 set pattern {add new stmt: MEM <vector\(2\) short int>}
8149 set macro "TEST_V2HI"
8150 return [check_cached_effective_target vect_slp_v2hi_store_unalign {
8151 expr [check_vect_slp_store_usage $pattern $macro ] }]
8154 # Return the true if target support vectorization of 4-byte short stores
8155 # with 4-byte aligned address at plain O2.
8156 proc check_effective_target_vect_slp_v2hi_store_align { } {
8157 set pattern {add new stmt: MEM <vector\(2\) short int>}
8158 set macro "TEST_V2HI_2"
8159 return [check_cached_effective_target vect_slp_v2hi_store_align {
8160 expr [check_vect_slp_store_usage $pattern $macro ] }]
8163 # Return the true if target support vectorization of 8-byte short stores
8164 # with unaligned address at plain O2.
8165 # NB: This target should be removed after real issues are fixed for
8166 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
8167 # this target since tests in check_vect_slp_store_usage
8168 # is the exact match of relative testcases
8169 proc check_effective_target_vect_slp_v4hi_store_unalign { } {
8170 set pattern {add new stmt: MEM <vector\(4\) short int>}
8171 set macro "TEST_V4HI"
8172 return [check_cached_effective_target vect_slp_v4hi_store_unalign {
8173 expr [check_vect_slp_store_usage $pattern $macro ] }]
8176 # Return the true if target support vectorization of 8-byte int stores
8177 # with 8-byte aligned address at plain O2.
8178 # NB: This target should be removed after real issues are fixed for
8179 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
8180 # this target since tests in check_vect_slp_store_usage
8181 # is the exact match of relative testcases
8182 proc check_effective_target_vect_slp_v2si_store_align { } {
8183 set pattern {add new stmt: MEM <vector\(2\) int>}
8184 set macro "TEST_V2SI"
8185 return [check_cached_effective_target vect_slp_v2si_store_align {
8186 expr [check_vect_slp_store_usage $pattern $macro ] }]
8189 # Return the true if target support vectorization of 16-byte int stores
8190 # with unaligned address at plain O2.
8191 # NB: This target should be removed after real issues are fixed for
8192 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
8193 # this target since tests in check_vect_slp_store_usage
8194 # is the exact match of relative testcases
8195 proc check_effective_target_vect_slp_v4si_store_unalign { } {
8196 set pattern {add new stmt: MEM <vector\(4\) int>}
8197 set macro "TEST_V4SI"
8198 return [check_cached_effective_target vect_slp_v4si_store_unalign {
8199 expr [check_vect_slp_store_usage $pattern $macro ] }]
8202 # Return 1 if we can align stack data to the preferred vector alignment.
8204 proc check_effective_target_vect_align_stack_vars { } {
8205 if { [check_effective_target_aarch64_sve] } {
8206 return [check_effective_target_vect_variable_length]
8211 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
8213 proc check_effective_target_vector_alignment_reachable { } {
8214 set et_vector_alignment_reachable 0
8215 if { [check_effective_target_vect_aligned_arrays]
8216 || [check_effective_target_natural_alignment_32] } {
8217 set et_vector_alignment_reachable 1
8219 verbose "check_effective_target_vector_alignment_reachable:\
8220 returning $et_vector_alignment_reachable" 2
8221 return $et_vector_alignment_reachable
8224 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
8226 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
8227 set et_vector_alignment_reachable_for_64bit 0
8228 if { [check_effective_target_vect_aligned_arrays]
8229 || [check_effective_target_natural_alignment_64] } {
8230 set et_vector_alignment_reachable_for_64bit 1
8232 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
8233 returning $et_vector_alignment_reachable_for_64bit" 2
8234 return $et_vector_alignment_reachable_for_64bit
8237 # Return 1 if the target only requires element alignment for vector accesses
8239 proc check_effective_target_vect_element_align { } {
8240 return [check_cached_effective_target_indexed vect_element_align {
8241 expr { ([istarget arm*-*-*]
8242 && ![check_effective_target_arm_vect_no_misalign])
8243 || [check_effective_target_vect_hw_misalign]
8244 || [istarget amdgcn-*-*] }}]
8247 # Return 1 if we expect to see unaligned accesses in at least some
8250 proc check_effective_target_vect_unaligned_possible { } {
8251 return [expr { ![check_effective_target_vect_element_align_preferred]
8252 && (![check_effective_target_vect_no_align]
8253 || [check_effective_target_vect_hw_misalign]) }]
8256 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
8258 proc check_effective_target_vect_load_lanes { } {
8259 # We don't support load_lanes correctly on big-endian arm.
8260 return [check_cached_effective_target vect_load_lanes {
8261 expr { ([check_effective_target_arm_little_endian]
8262 && [check_effective_target_arm_neon_ok])
8263 || [istarget aarch64*-*-*] }}]
8266 # Return 1 if the target supports vector masked loads.
8268 proc check_effective_target_vect_masked_load { } {
8269 return [expr { [check_avx_available]
8270 || [check_effective_target_aarch64_sve]
8271 || [istarget amdgcn*-*-*] } ]
8274 # Return 1 if the target supports vector masked stores.
8276 proc check_effective_target_vect_masked_store { } {
8277 return [expr { [check_effective_target_aarch64_sve]
8278 || [istarget amdgcn*-*-*] }]
8281 # Return 1 if the target supports vector gather loads via internal functions.
8283 proc check_effective_target_vect_gather_load_ifn { } {
8284 return [expr { [check_effective_target_aarch64_sve] }]
8287 # Return 1 if the target supports vector scatter stores.
8289 proc check_effective_target_vect_scatter_store { } {
8290 return [expr { [check_effective_target_aarch64_sve]
8291 || [istarget amdgcn*-*-*] }]
8294 # Return 1 if the target supports vector conditional operations, 0 otherwise.
8296 proc check_effective_target_vect_condition { } {
8297 return [check_cached_effective_target_indexed vect_condition {
8298 expr { [istarget aarch64*-*-*]
8299 || [istarget powerpc*-*-*]
8300 || [istarget ia64-*-*]
8301 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8302 || ([istarget mips*-*-*]
8303 && [et-is-effective-target mips_msa])
8304 || ([istarget arm*-*-*]
8305 && [check_effective_target_arm_neon_ok])
8306 || ([istarget s390*-*-*]
8307 && [check_effective_target_s390_vx])
8308 || [istarget amdgcn-*-*] }}]
8311 # Return 1 if the target supports vector conditional operations where
8312 # the comparison has different type from the lhs, 0 otherwise.
8314 proc check_effective_target_vect_cond_mixed { } {
8315 return [check_cached_effective_target_indexed vect_cond_mixed {
8316 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
8317 || [istarget aarch64*-*-*]
8318 || [istarget powerpc*-*-*]
8319 || ([istarget arm*-*-*]
8320 && [check_effective_target_arm_neon_ok])
8321 || ([istarget mips*-*-*]
8322 && [et-is-effective-target mips_msa])
8323 || ([istarget s390*-*-*]
8324 && [check_effective_target_s390_vx])
8325 || [istarget amdgcn-*-*] }}]
8328 # Return 1 if the target supports vector char multiplication, 0 otherwise.
8330 proc check_effective_target_vect_char_mult { } {
8331 return [check_cached_effective_target_indexed vect_char_mult {
8332 expr { [istarget aarch64*-*-*]
8333 || [istarget ia64-*-*]
8334 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8335 || [check_effective_target_arm32]
8336 || [check_effective_target_powerpc_altivec]
8337 || ([istarget mips*-*-*]
8338 && [et-is-effective-target mips_msa])
8339 || ([istarget s390*-*-*]
8340 && [check_effective_target_s390_vx])
8341 || [istarget amdgcn-*-*] }}]
8344 # Return 1 if the target supports vector short multiplication, 0 otherwise.
8346 proc check_effective_target_vect_short_mult { } {
8347 return [check_cached_effective_target_indexed vect_short_mult {
8348 expr { [istarget ia64-*-*]
8349 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8350 || [istarget powerpc*-*-*]
8351 || [istarget aarch64*-*-*]
8352 || [check_effective_target_arm32]
8353 || ([istarget mips*-*-*]
8354 && ([et-is-effective-target mips_msa]
8355 || [et-is-effective-target mips_loongson_mmi]))
8356 || ([istarget s390*-*-*]
8357 && [check_effective_target_s390_vx])
8358 || [istarget amdgcn-*-*] }}]
8361 # Return 1 if the target supports vector int multiplication, 0 otherwise.
8363 proc check_effective_target_vect_int_mult { } {
8364 return [check_cached_effective_target_indexed vect_int_mult {
8365 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
8366 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8367 || [istarget ia64-*-*]
8368 || [istarget aarch64*-*-*]
8369 || ([istarget mips*-*-*]
8370 && [et-is-effective-target mips_msa])
8371 || [check_effective_target_arm32]
8372 || ([istarget s390*-*-*]
8373 && [check_effective_target_s390_vx])
8374 || [istarget amdgcn-*-*] }}]
8377 # Return 1 if the target supports 64 bit hardware vector
8378 # multiplication of long operands with a long result, 0 otherwise.
8380 # This can change for different subtargets so do not cache the result.
8382 proc check_effective_target_vect_long_mult { } {
8383 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
8384 || (([istarget powerpc*-*-*]
8385 && ![istarget powerpc-*-linux*paired*])
8386 && [check_effective_target_ilp32])
8387 || [is-effective-target arm_neon]
8388 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
8389 || [istarget aarch64*-*-*]
8390 || ([istarget mips*-*-*]
8391 && [et-is-effective-target mips_msa]) } {
8397 verbose "check_effective_target_vect_long_mult: returning $answer" 2
8401 # Return 1 if the target supports vector int modulus, 0 otherwise.
8403 proc check_effective_target_vect_int_mod { } {
8404 return [check_cached_effective_target_indexed vect_int_mod {
8405 expr { [istarget powerpc*-*-*]
8406 && [check_effective_target_has_arch_pwr10] }}]
8409 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
8411 proc check_effective_target_vect_extract_even_odd { } {
8412 return [check_cached_effective_target_indexed extract_even_odd {
8413 expr { [istarget aarch64*-*-*]
8414 || [istarget powerpc*-*-*]
8415 || [is-effective-target arm_neon]
8416 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8417 || [istarget ia64-*-*]
8418 || ([istarget mips*-*-*]
8419 && ([et-is-effective-target mips_msa]
8420 || [et-is-effective-target mpaired_single]))
8421 || ([istarget s390*-*-*]
8422 && [check_effective_target_s390_vx]) }}]
8425 # Return 1 if the target supports vector interleaving, 0 otherwise.
8427 proc check_effective_target_vect_interleave { } {
8428 return [check_cached_effective_target_indexed vect_interleave {
8429 expr { [istarget aarch64*-*-*]
8430 || [istarget powerpc*-*-*]
8431 || [is-effective-target arm_neon]
8432 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8433 || [istarget ia64-*-*]
8434 || ([istarget mips*-*-*]
8435 && ([et-is-effective-target mpaired_single]
8436 || [et-is-effective-target mips_msa]))
8437 || ([istarget s390*-*-*]
8438 && [check_effective_target_s390_vx]) }}]
8441 foreach N {2 3 4 8} {
8442 eval [string map [list N $N] {
8443 # Return 1 if the target supports 2-vector interleaving
8444 proc check_effective_target_vect_stridedN { } {
8445 return [check_cached_effective_target_indexed vect_stridedN {
8447 && [check_effective_target_vect_interleave]
8448 && [check_effective_target_vect_extract_even_odd] } {
8451 if { ([istarget arm*-*-*]
8452 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
8455 if [check_effective_target_vect_fully_masked] {
8464 # Return the list of vector sizes (in bits) that each target supports.
8465 # A vector length of "0" indicates variable-length vectors.
8467 proc available_vector_sizes { } {
8469 if { [istarget aarch64*-*-*] } {
8470 if { [check_effective_target_aarch64_sve] } {
8471 lappend result [aarch64_sve_bits]
8473 lappend result 128 64
8474 } elseif { [istarget arm*-*-*]
8475 && [check_effective_target_arm_neon_ok] } {
8476 lappend result 128 64
8477 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8478 if { [check_avx_available] && ![check_prefer_avx128] } {
8482 if { ![is-effective-target ia32] } {
8486 } elseif { [istarget sparc*-*-*] } {
8488 } elseif { [istarget amdgcn*-*-*] } {
8489 # 6 different lane counts, and 4 element sizes
8490 lappend result 4096 2048 1024 512 256 128 64 32 16 8 4 2
8492 # The traditional default asumption.
8498 # Return 1 if the target supports multiple vector sizes
8500 proc check_effective_target_vect_multiple_sizes { } {
8501 return [expr { [llength [available_vector_sizes]] > 1 }]
8504 # Return true if variable-length vectors are supported.
8506 proc check_effective_target_vect_variable_length { } {
8507 return [expr { [lindex [available_vector_sizes] 0] == 0 }]
8510 # Return 1 if the target supports vectors of 64 bits.
8512 proc check_effective_target_vect64 { } {
8513 return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
8516 # Return 1 if the target supports vectors of 32 bits.
8518 proc check_effective_target_vect32 { } {
8519 return [expr { [lsearch -exact [available_vector_sizes] 32] >= 0 }]
8522 # Return 1 if the target supports vector copysignf calls.
8524 proc check_effective_target_vect_call_copysignf { } {
8525 return [check_cached_effective_target_indexed vect_call_copysignf {
8526 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
8527 || [istarget powerpc*-*-*]
8528 || [istarget aarch64*-*-*] }}]
8531 # Return 1 if the target supports hardware square root instructions.
8533 proc check_effective_target_sqrt_insn { } {
8534 return [check_cached_effective_target sqrt_insn {
8535 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
8536 || [check_effective_target_powerpc_sqrt]
8537 || [istarget aarch64*-*-*]
8538 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
8539 || ([istarget s390*-*-*]
8540 && [check_effective_target_s390_vx])
8541 || [istarget amdgcn-*-*] }}]
8544 # Return any additional options to enable square root intructions.
8546 proc add_options_for_sqrt_insn { flags } {
8547 if { [istarget amdgcn*-*-*] } {
8548 return "$flags -ffast-math"
8550 if { [istarget arm*-*-*] } {
8551 return [add_options_for_arm_vfp "$flags"]
8556 # Return 1 if the target supports vector sqrtf calls.
8558 proc check_effective_target_vect_call_sqrtf { } {
8559 return [check_cached_effective_target_indexed vect_call_sqrtf {
8560 expr { [istarget aarch64*-*-*]
8561 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8562 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
8563 || ([istarget s390*-*-*]
8564 && [check_effective_target_s390_vx]) }}]
8567 # Return 1 if the target supports vector lrint calls.
8569 proc check_effective_target_vect_call_lrint { } {
8570 set et_vect_call_lrint 0
8571 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
8572 && [check_effective_target_ilp32])
8573 || [istarget amdgcn-*-*] } {
8574 set et_vect_call_lrint 1
8577 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
8578 return $et_vect_call_lrint
8581 # Return 1 if the target supports vector btrunc calls.
8583 proc check_effective_target_vect_call_btrunc { } {
8584 return [check_cached_effective_target_indexed vect_call_btrunc {
8585 expr { [istarget aarch64*-*-*]
8586 || [istarget amdgcn-*-*] }}]
8589 # Return 1 if the target supports vector btruncf calls.
8591 proc check_effective_target_vect_call_btruncf { } {
8592 return [check_cached_effective_target_indexed vect_call_btruncf {
8593 expr { [istarget aarch64*-*-*]
8594 || [istarget amdgcn-*-*] }}]
8597 # Return 1 if the target supports vector ceil calls.
8599 proc check_effective_target_vect_call_ceil { } {
8600 return [check_cached_effective_target_indexed vect_call_ceil {
8601 expr { [istarget aarch64*-*-*]
8602 || [istarget amdgcn-*-*] }}]
8605 # Return 1 if the target supports vector ceilf calls.
8607 proc check_effective_target_vect_call_ceilf { } {
8608 return [check_cached_effective_target_indexed vect_call_ceilf {
8609 expr { [istarget aarch64*-*-*] }}]
8612 # Return 1 if the target supports vector floor calls.
8614 proc check_effective_target_vect_call_floor { } {
8615 return [check_cached_effective_target_indexed vect_call_floor {
8616 expr { [istarget aarch64*-*-*] }}]
8619 # Return 1 if the target supports vector floorf calls.
8621 proc check_effective_target_vect_call_floorf { } {
8622 return [check_cached_effective_target_indexed vect_call_floorf {
8623 expr { [istarget aarch64*-*-*]
8624 || [istarget amdgcn-*-*] }}]
8627 # Return 1 if the target supports vector lceil calls.
8629 proc check_effective_target_vect_call_lceil { } {
8630 return [check_cached_effective_target_indexed vect_call_lceil {
8631 expr { [istarget aarch64*-*-*] }}]
8634 # Return 1 if the target supports vector lfloor calls.
8636 proc check_effective_target_vect_call_lfloor { } {
8637 return [check_cached_effective_target_indexed vect_call_lfloor {
8638 expr { [istarget aarch64*-*-*] }}]
8641 # Return 1 if the target supports vector nearbyint calls.
8643 proc check_effective_target_vect_call_nearbyint { } {
8644 return [check_cached_effective_target_indexed vect_call_nearbyint {
8645 expr { [istarget aarch64*-*-*] }}]
8648 # Return 1 if the target supports vector nearbyintf calls.
8650 proc check_effective_target_vect_call_nearbyintf { } {
8651 return [check_cached_effective_target_indexed vect_call_nearbyintf {
8652 expr { [istarget aarch64*-*-*] }}]
8655 # Return 1 if the target supports vector round calls.
8657 proc check_effective_target_vect_call_round { } {
8658 return [check_cached_effective_target_indexed vect_call_round {
8659 expr { [istarget aarch64*-*-*] }}]
8662 # Return 1 if the target supports vector roundf calls.
8664 proc check_effective_target_vect_call_roundf { } {
8665 return [check_cached_effective_target_indexed vect_call_roundf {
8666 expr { [istarget aarch64*-*-*] }}]
8669 # Return 1 if the target supports AND, OR and XOR reduction.
8671 proc check_effective_target_vect_logical_reduc { } {
8672 return [check_effective_target_aarch64_sve]
8675 # Return 1 if the target supports the fold_extract_last optab.
8677 proc check_effective_target_vect_fold_extract_last { } {
8678 return [expr { [check_effective_target_aarch64_sve]
8679 || [istarget amdgcn*-*-*] }]
8682 # Return 1 if the target supports section-anchors
8684 proc check_effective_target_section_anchors { } {
8685 return [check_cached_effective_target section_anchors {
8686 expr { [istarget powerpc*-*-*]
8687 || [istarget arm*-*-*]
8688 || [istarget aarch64*-*-*] }}]
8691 # Return 1 if the target supports atomic operations on "int_128" values.
8693 proc check_effective_target_sync_int_128 { } {
8697 # Return 1 if the target supports atomic operations on "int_128" values
8698 # and can execute them.
8699 # This requires support for both compare-and-swap and true atomic loads.
8701 proc check_effective_target_sync_int_128_runtime { } {
8705 # Return 1 if the target supports atomic operations on "long long".
8707 # Note: 32bit x86 targets require -march=pentium in dg-options.
8708 # Note: 32bit s390 targets require -mzarch in dg-options.
8710 proc check_effective_target_sync_long_long { } {
8711 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
8712 || [istarget aarch64*-*-*]
8713 || [istarget arm*-*-*]
8714 || [istarget alpha*-*-*]
8715 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
8716 || [istarget s390*-*-*] } {
8723 # Return 1 if the target supports popcount on long.
8725 proc check_effective_target_popcountl { } {
8726 return [check_no_messages_and_pattern popcountl "!\\(call" rtl-expand {
8729 return __builtin_popcountl (b);
8734 # Return 1 if the target supports popcount on long long.
8736 proc check_effective_target_popcountll { } {
8737 return [check_no_messages_and_pattern popcountll "!\\(call" rtl-expand {
8738 int foo (long long b)
8740 return __builtin_popcountll (b);
8746 # Return 1 if the target supports popcount on int.
8748 proc check_effective_target_popcount { } {
8749 return [check_no_messages_and_pattern popcount "!\\(call" rtl-expand {
8752 return __builtin_popcount (b);
8757 # Return 1 if the target supports clz on int.
8759 proc check_effective_target_clz { } {
8760 return [check_no_messages_and_pattern clz "!\\(call" rtl-expand {
8763 return __builtin_clz (b);
8768 # Return 1 if the target supports clz on long.
8770 proc check_effective_target_clzl { } {
8771 return [check_no_messages_and_pattern clzl "!\\(call" rtl-expand {
8774 return __builtin_clzl (b);
8779 # Return 1 if the target supports clz on long long.
8781 proc check_effective_target_clzll { } {
8782 return [check_no_messages_and_pattern clzll "!\\(call" rtl-expand {
8783 int foo (long long b)
8785 return __builtin_clzll (b);
8790 # Return 1 if the target supports ctz on int.
8792 proc check_effective_target_ctz { } {
8793 return [check_no_messages_and_pattern ctz "!\\(call" rtl-expand {
8796 return __builtin_ctz (b);
8801 # Return 1 if the target supports ctz on long.
8803 proc check_effective_target_ctzl { } {
8804 return [check_no_messages_and_pattern ctzl "!\\(call" rtl-expand {
8807 return __builtin_ctzl (b);
8812 # Return 1 if the target supports ctz on long long.
8814 proc check_effective_target_ctzll { } {
8815 return [check_no_messages_and_pattern ctzll "!\\(call" rtl-expand {
8816 int foo (long long b)
8818 return __builtin_ctzll (b);
8823 # Return 1 if the target supports atomic operations on "long long"
8824 # and can execute them.
8826 # Note: 32bit x86 targets require -march=pentium in dg-options.
8828 proc check_effective_target_sync_long_long_runtime { } {
8829 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
8830 && [check_cached_effective_target sync_long_long_available {
8831 check_runtime_nocache sync_long_long_available {
8835 unsigned int eax, ebx, ecx, edx;
8836 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
8837 return !(edx & bit_CMPXCHG8B);
8842 || [istarget aarch64*-*-*]
8843 || [istarget arm*-*-uclinuxfdpiceabi]
8844 || ([istarget arm*-*-linux-*]
8845 && [check_runtime sync_longlong_runtime {
8851 if (sizeof (long long) != 8)
8854 /* Just check for native;
8855 checking for kernel fallback is tricky. */
8856 asm volatile ("ldrexd r0,r1, [%0]"
8857 : : "r" (&l1) : "r0", "r1");
8861 || [istarget alpha*-*-*]
8862 || ([istarget sparc*-*-*]
8863 && [check_effective_target_lp64]
8864 && [check_effective_target_ultrasparc_hw])
8865 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
8872 # Return 1 if the target supports byte swap instructions.
8874 proc check_effective_target_bswap { } {
8875 return [check_cached_effective_target bswap {
8876 expr { [istarget aarch64*-*-*]
8877 || [istarget alpha*-*-*]
8878 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8879 || [istarget m68k-*-*]
8880 || [istarget powerpc*-*-*]
8881 || [istarget rs6000-*-*]
8882 || [istarget s390*-*-*]
8883 || ([istarget riscv*-*-*]
8884 && [check_no_compiler_messages_nocache riscv_zbb object {
8885 #if __riscv_zbb <= 0
8886 #error ZBB is not enabled
8890 || ([istarget arm*-*-*]
8891 && [check_no_compiler_messages_nocache arm_v6_or_later object {
8893 #error not armv6 or later
8899 # Return 1 if the target supports atomic operations on "int" and "long".
8901 proc check_effective_target_sync_int_long { } {
8902 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
8903 # load-reserved/store-conditional instructions.
8904 return [check_cached_effective_target sync_int_long {
8905 expr { [istarget ia64-*-*]
8906 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8907 || [istarget aarch64*-*-*]
8908 || [istarget alpha*-*-*]
8909 || [istarget arm*-*-linux-*]
8910 || [istarget arm*-*-uclinuxfdpiceabi]
8911 || ([istarget arm*-*-*]
8912 && [check_effective_target_arm_acq_rel])
8913 || [istarget bfin*-*linux*]
8914 || [istarget hppa*-*linux*]
8915 || [istarget s390*-*-*]
8916 || [istarget powerpc*-*-*]
8917 || [istarget cris-*-*]
8918 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
8919 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
8920 || [check_effective_target_mips_llsc]
8921 || [istarget nvptx*-*-*]
8925 # Return 1 if the target supports atomic operations on "int" and "long" on
8928 proc check_effective_target_sync_int_long_stack { } {
8929 return [check_cached_effective_target sync_int_long_stack {
8930 expr { ![istarget nvptx*-*-*]
8931 && [check_effective_target_sync_int_long]
8935 # Return 1 if the target supports atomic operations on "char" and "short".
8937 proc check_effective_target_sync_char_short { } {
8938 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
8939 # load-reserved/store-conditional instructions.
8940 return [check_cached_effective_target sync_char_short {
8941 expr { [istarget aarch64*-*-*]
8942 || [istarget ia64-*-*]
8943 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8944 || [istarget alpha*-*-*]
8945 || [istarget arm*-*-linux-*]
8946 || [istarget arm*-*-uclinuxfdpiceabi]
8947 || ([istarget arm*-*-*]
8948 && [check_effective_target_arm_acq_rel])
8949 || [istarget hppa*-*linux*]
8950 || [istarget s390*-*-*]
8951 || [istarget powerpc*-*-*]
8952 || [istarget cris-*-*]
8953 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
8954 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
8955 || [istarget loongarch*-*-*]
8956 || [check_effective_target_mips_llsc] }}]
8959 # Return 1 if the target uses a ColdFire FPU.
8961 proc check_effective_target_coldfire_fpu { } {
8962 return [check_no_compiler_messages coldfire_fpu assembly {
8969 # Return true if this is a uClibc target.
8971 proc check_effective_target_uclibc {} {
8972 return [check_no_compiler_messages uclibc object {
8973 #include <features.h>
8974 #if !defined (__UCLIBC__)
8980 # Return true if this is a uclibc target and if the uclibc feature
8981 # described by __$feature__ is not present.
8983 proc check_missing_uclibc_feature {feature} {
8984 return [check_no_compiler_messages $feature object "
8985 #include <features.h>
8986 #if !defined (__UCLIBC) || defined (__${feature}__)
8992 # Return true if this is a Newlib target.
8994 proc check_effective_target_newlib {} {
8995 return [check_no_compiler_messages newlib object {
9000 # Return true if GCC was configured with --enable-newlib-nano-formatted-io
9001 proc check_effective_target_newlib_nano_io { } {
9002 return [check_configured_with "--enable-newlib-nano-formatted-io"]
9005 # Some newlib versions don't provide a frexpl and instead depend
9006 # on frexp to implement long double conversions in their printf-like
9007 # functions. This leads to broken results. Detect such versions here.
9009 proc check_effective_target_newlib_broken_long_double_io {} {
9010 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
9016 # Return true if this is NOT a Bionic target.
9018 proc check_effective_target_non_bionic {} {
9019 return [check_no_compiler_messages non_bionic object {
9021 #if defined (__BIONIC__)
9027 # Return true if this target has error.h header.
9029 proc check_effective_target_error_h {} {
9030 return [check_no_compiler_messages error_h object {
9035 # Return true if this target has tgmath.h header.
9037 proc check_effective_target_tgmath_h {} {
9038 return [check_no_compiler_messages tgmath_h object {
9043 # Return true if target's libc supports complex functions.
9045 proc check_effective_target_libc_has_complex_functions {} {
9046 return [check_no_compiler_messages libc_has_complex_functions object {
9047 #include <complex.h>
9052 # (a) an error of a few ULP is expected in string to floating-point
9053 # conversion functions; and
9054 # (b) overflow is not always detected correctly by those functions.
9056 proc check_effective_target_lax_strtofp {} {
9057 # By default, assume that all uClibc targets suffer from this.
9058 return [check_effective_target_uclibc]
9061 # Return 1 if this is a target for which wcsftime is a dummy
9062 # function that always returns 0.
9064 proc check_effective_target_dummy_wcsftime {} {
9065 # By default, assume that all uClibc targets suffer from this.
9066 return [check_effective_target_uclibc]
9069 # Return 1 if constructors with initialization priority arguments are
9070 # supposed on this target.
9072 proc check_effective_target_init_priority {} {
9073 return [check_no_compiler_messages init_priority assembly "
9074 void f() __attribute__((constructor (1000)));
9079 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
9080 # This can be used with any check_* proc that takes no argument and
9081 # returns only 1 or 0. It could be used with check_* procs that take
9082 # arguments with keywords that pass particular arguments.
9084 proc is-effective-target { arg } {
9087 if { ![info exists et_index] } {
9088 # Initialize the effective target index that is used in some
9089 # check_effective_target_* procs.
9092 if { [info procs check_effective_target_${arg}] != [list] } {
9093 set selected [check_effective_target_${arg}]
9096 "vmx_hw" { set selected [check_vmx_hw_available] }
9097 "vsx_hw" { set selected [check_vsx_hw_available] }
9098 "p8vector_hw" { set selected [check_p8vector_hw_available] }
9099 "p9vector_hw" { set selected [check_p9vector_hw_available] }
9100 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
9101 "power10_hw" { set selected [check_power10_hw_available] }
9102 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
9103 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
9104 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
9105 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
9106 "ppc_mma_hw" { set selected [check_ppc_mma_hw_available] }
9107 "dfp_hw" { set selected [check_dfp_hw_available] }
9108 "htm_hw" { set selected [check_htm_hw_available] }
9109 "named_sections" { set selected [check_named_sections_available] }
9110 "gc_sections" { set selected [check_gc_sections_available] }
9111 "cxa_atexit" { set selected [check_cxa_atexit_available] }
9112 default { error "unknown effective target keyword `$arg'" }
9116 verbose "is-effective-target: $arg $selected" 2
9120 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
9122 proc is-effective-target-keyword { arg } {
9123 if { [info procs check_effective_target_${arg}] != [list] } {
9126 # These have different names for their check_* procs.
9128 "vmx_hw" { return 1 }
9129 "vsx_hw" { return 1 }
9130 "p8vector_hw" { return 1 }
9131 "p9vector_hw" { return 1 }
9132 "p9modulo_hw" { return 1 }
9133 "power10_hw" { return 1 }
9134 "ppc_float128_sw" { return 1 }
9135 "ppc_float128_hw" { return 1 }
9136 "ppc_recip_hw" { return 1 }
9137 "ppc_mma_hw" { return 1 }
9138 "dfp_hw" { return 1 }
9139 "htm_hw" { return 1 }
9140 "named_sections" { return 1 }
9141 "gc_sections" { return 1 }
9142 "cxa_atexit" { return 1 }
9143 default { return 0 }
9148 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
9149 # indicate what target is currently being processed. This is for
9150 # the vectorizer tests, e.g. vect_int, to keep track what target supports
9153 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
9154 global dg-do-what-default
9155 global EFFECTIVE_TARGETS
9158 if { [llength $EFFECTIVE_TARGETS] > 0 } {
9159 foreach target $EFFECTIVE_TARGETS {
9160 set target_flags $flags
9161 set dg-do-what-default compile
9162 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
9163 if { [info procs add_options_for_${target}] != [list] } {
9164 set target_flags [add_options_for_${target} "$flags"]
9166 if { [info procs check_effective_target_${target}_runtime]
9167 != [list] && [check_effective_target_${target}_runtime] } {
9168 set dg-do-what-default run
9170 $runtest $testcases $target_flags ${default-extra-flags}
9174 $runtest $testcases $flags ${default-extra-flags}
9178 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
9179 # et_index, 0 otherwise.
9181 proc et-is-effective-target { target } {
9182 global EFFECTIVE_TARGETS
9185 if { [info exists EFFECTIVE_TARGETS] } {
9186 if { [llength $EFFECTIVE_TARGETS] > $et_index
9187 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
9193 return [check_effective_target_${target}]
9197 # Return 1 if target default to short enums
9199 proc check_effective_target_short_enums { } {
9200 return [check_no_compiler_messages short_enums assembly {
9202 int s[sizeof (enum foo) == 1 ? 1 : -1];
9206 # Return 1 if target supports merging string constants at link time.
9208 proc check_effective_target_string_merging { } {
9209 return [check_no_messages_and_pattern string_merging \
9210 "rodata\\.str" assembly {
9211 const char *var = "String";
9215 # Return 1 if target has the basic signed and unsigned types in
9216 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
9217 # working <stdint.h> for all targets.
9219 proc check_effective_target_stdint_types { } {
9220 return [check_no_compiler_messages stdint_types assembly {
9222 int8_t a; int16_t b; int32_t c; int64_t d;
9223 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
9227 # Like check_effective_target_stdint_types, but test what happens when
9228 # -mbig-endian is passed. This test only makes sense on targets that
9229 # support -mbig-endian; it will fail elsewhere.
9231 proc check_effective_target_stdint_types_mbig_endian { } {
9232 return [check_no_compiler_messages stdint_types_mbig_endian assembly {
9234 int8_t a; int16_t b; int32_t c; int64_t d;
9235 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
9239 # Return 1 if target has the basic signed and unsigned types in
9240 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
9241 # these types agree with those in the header, as some systems have
9242 # only <inttypes.h>.
9244 proc check_effective_target_inttypes_types { } {
9245 return [check_no_compiler_messages inttypes_types assembly {
9246 #include <inttypes.h>
9247 int8_t a; int16_t b; int32_t c; int64_t d;
9248 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
9252 # Return 1 if programs are intended to be run on a simulator
9253 # (i.e. slowly) rather than hardware (i.e. fast).
9255 proc check_effective_target_simulator { } {
9257 # All "src/sim" simulators set this one.
9258 if [board_info target exists is_simulator] {
9259 return [board_info target is_simulator]
9262 # The "sid" simulators don't set that one, but at least they set
9264 if [board_info target exists slow_simulator] {
9265 return [board_info target slow_simulator]
9271 # Return 1 if programs are intended to be run on hardware rather than
9274 proc check_effective_target_hw { } {
9276 # All "src/sim" simulators set this one.
9277 if [board_info target exists is_simulator] {
9278 if [board_info target is_simulator] {
9285 # The "sid" simulators don't set that one, but at least they set
9287 if [board_info target exists slow_simulator] {
9288 if [board_info target slow_simulator] {
9298 # Return 1 if the target is a VxWorks kernel.
9300 proc check_effective_target_vxworks_kernel { } {
9301 return [check_no_compiler_messages vxworks_kernel assembly {
9302 #if !defined __vxworks || defined __RTP__
9308 # Return 1 if the target is a VxWorks RTP.
9310 proc check_effective_target_vxworks_rtp { } {
9311 return [check_no_compiler_messages vxworks_rtp assembly {
9312 #if !defined __vxworks || !defined __RTP__
9318 # Return 1 if the target is expected to provide wide character support.
9320 proc check_effective_target_wchar { } {
9321 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
9324 return [check_no_compiler_messages wchar assembly {
9329 # Return 1 if the target has <pthread.h>.
9331 proc check_effective_target_pthread_h { } {
9332 return [check_no_compiler_messages pthread_h assembly {
9333 #include <pthread.h>
9337 # Return 1 if the target can truncate a file from a file-descriptor,
9338 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
9339 # chsize. We test for a trivially functional truncation; no stubs.
9340 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
9341 # different function to be used.
9343 proc check_effective_target_fd_truncate { } {
9345 #define _FILE_OFFSET_BITS 64
9352 FILE *f = fopen ("tst.tmp", "wb");
9354 const char t[] = "test writing more than ten characters";
9358 write (fd, t, sizeof (t) - 1);
9360 if (ftruncate (fd, 10) != 0)
9369 f = fopen ("tst.tmp", "rb");
9370 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
9378 if { [check_runtime ftruncate $prog] } {
9382 regsub "ftruncate" $prog "chsize" prog
9383 return [check_runtime chsize $prog]
9386 # Add to FLAGS all the target-specific flags needed to enable
9387 # full IEEE compliance mode.
9389 proc add_options_for_ieee { flags } {
9390 if { [istarget alpha*-*-*]
9391 || [istarget sh*-*-*] } {
9392 return "$flags -mieee"
9394 if { [istarget rx-*-*] } {
9395 return "$flags -mnofpu"
9400 if {![info exists flags_to_postpone]} {
9401 set flags_to_postpone ""
9404 # Add to FLAGS the flags needed to enable functions to bind locally
9405 # when using pic/PIC passes in the testsuite.
9406 proc add_options_for_bind_pic_locally { flags } {
9407 global flags_to_postpone
9409 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
9410 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
9411 # order to make sure that the multilib_flags doesn't override this.
9413 if {[check_no_compiler_messages using_pic2 assembly {
9418 set flags_to_postpone "-fPIE"
9421 if {[check_no_compiler_messages using_pic1 assembly {
9426 set flags_to_postpone "-fpie"
9432 # Add to FLAGS the flags needed to enable 64-bit vectors.
9434 proc add_options_for_double_vectors { flags } {
9435 if [is-effective-target arm_neon_ok] {
9436 return "$flags -mvectorize-with-neon-double"
9442 # Add to FLAGS the flags needed to define the STACK_SIZE macro.
9444 proc add_options_for_stack_size { flags } {
9445 if [is-effective-target stack_size] {
9446 set stack_size [dg-effective-target-value stack_size]
9447 return "$flags -DSTACK_SIZE=$stack_size"
9453 # Return 1 if the target provides a full C99 runtime.
9455 proc check_effective_target_c99_runtime { } {
9456 return [check_cached_effective_target c99_runtime {
9459 set file [open "$srcdir/gcc.dg/builtins-config.h"]
9460 set contents [read $file]
9463 #ifndef HAVE_C99_RUNTIME
9464 #error !HAVE_C99_RUNTIME
9467 check_no_compiler_messages_nocache c99_runtime assembly $contents
9471 # Return 1 if the target provides the D runtime.
9473 proc check_effective_target_d_runtime { } {
9474 return [check_no_compiler_messages d_runtime executable {
9478 extern(C) int main() {
9484 # Return 1 if the target provides the D standard library.
9486 proc check_effective_target_d_runtime_has_std_library { } {
9487 return [check_no_compiler_messages d_runtime_has_std_library executable {
9491 extern(C) int main() {
9493 real function(real) pcos = &cos;
9499 # Return 1 if target wchar_t is at least 4 bytes.
9501 proc check_effective_target_4byte_wchar_t { } {
9502 return [check_no_compiler_messages 4byte_wchar_t object {
9503 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
9507 # Return 1 if the target supports automatic stack alignment.
9509 proc check_effective_target_automatic_stack_alignment { } {
9510 # Ordinarily x86 supports automatic stack alignment ...
9511 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
9512 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
9513 # ... except Win64 SEH doesn't. Succeed for Win32 though.
9514 return [check_effective_target_ilp32];
9521 # Return true if we are compiling for AVX target.
9523 proc check_avx_available { } {
9524 if { [check_no_compiler_messages avx_available assembly {
9534 # Return true if we are compiling for AVX2 target.
9536 proc check_avx2_available { } {
9537 if { [check_no_compiler_messages avx2_available assembly {
9547 # Return true if we are compiling for SSSE3 target.
9549 proc check_ssse3_available { } {
9550 if { [check_no_compiler_messages sse3a_available assembly {
9560 # Return true if 32- and 16-bytes vectors are available.
9562 proc check_effective_target_vect_sizes_32B_16B { } {
9563 return [expr { [available_vector_sizes] == [list 256 128] }]
9566 # Return true if 16- and 8-bytes vectors are available.
9568 proc check_effective_target_vect_sizes_16B_8B { } {
9569 if { [check_avx_available]
9570 || [is-effective-target arm_neon]
9571 || [istarget aarch64*-*-*] } {
9579 # Return true if 128-bits vectors are preferred even if 256-bits vectors
9582 proc check_prefer_avx128 { } {
9583 if ![check_avx_available] {
9586 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
9587 float a[1024],b[1024],c[1024];
9588 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
9589 } "-O2 -ftree-vectorize"]
9593 # Return 1 if avx512fp16 instructions can be compiled.
9595 proc check_effective_target_avx512fp16 { } {
9596 return [check_no_compiler_messages avx512fp16 object {
9599 asm volatile ("vmovw %edi, %xmm0");
9601 } "-O2 -mavx512fp16" ]
9604 # Return 1 if avx512f instructions can be compiled.
9606 proc check_effective_target_avx512f { } {
9607 return [check_no_compiler_messages avx512f object {
9608 typedef double __m512d __attribute__ ((__vector_size__ (64)));
9609 typedef double __m128d __attribute__ ((__vector_size__ (16)));
9611 __m512d _mm512_add (__m512d a)
9613 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
9616 __m128d _mm128_add (__m128d a)
9618 return __builtin_ia32_addsd_round (a, a, 8);
9621 __m128d _mm128_getmant (__m128d a)
9623 return __builtin_ia32_getmantsd_round (a, a, 0, 8);
9628 # Return 1 if avx instructions can be compiled.
9630 proc check_effective_target_avx { } {
9631 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9634 return [check_no_compiler_messages avx object {
9635 void _mm256_zeroall (void)
9637 __builtin_ia32_vzeroall ();
9642 # Return 1 if avx2 instructions can be compiled.
9643 proc check_effective_target_avx2 { } {
9644 return [check_no_compiler_messages avx2 object {
9645 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
9647 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
9649 return __builtin_ia32_andnotsi256 (__X, __Y);
9654 # Return 1 if avxvnni instructions can be compiled.
9655 proc check_effective_target_avxvnni { } {
9656 return [check_no_compiler_messages avxvnni object {
9657 typedef int __v8si __attribute__ ((__vector_size__ (32)));
9659 _mm256_dpbusd_epi32 (__v8si __A, __v8si __B, __v8si __C)
9661 return __builtin_ia32_vpdpbusd_v8si (__A, __B, __C);
9666 # Return 1 if avxifma instructions can be compiled.
9667 proc check_effective_target_avxifma { } {
9668 return [check_no_compiler_messages avxifma object {
9669 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
9671 _mm256_maddlo_epu64 (__v4di __A, __v4di __B, __v4di __C)
9673 return __builtin_ia32_vpmadd52luq256 (__A, __B, __C);
9678 # Return 1 if avxvnniint8 instructions can be compiled.
9679 proc check_effective_target_avxvnniint8 { } {
9680 return [check_no_compiler_messages avxvnniint8 object {
9681 typedef int __v8si __attribute__ ((__vector_size__ (32)));
9683 _mm256_dpbssd_epi32 (__v8si __A, __v8si __B, __v8si __C)
9685 return __builtin_ia32_vpdpbssd256 (__A, __B, __C);
9687 } "-O0 -mavxvnniint8" ]
9690 # Return 1 if avxneconvert instructions can be compiled.
9691 proc check_effective_target_avxneconvert { } {
9692 return [check_no_compiler_messages avxneconvert object {
9693 typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
9695 _mm_bcstnebf16_ps (const void *__P)
9697 return (__m128) __builtin_ia32_vbcstnebf162ps128 ((const __bf16 *) __P);
9699 } "-O0 -mavxneconvert" ]
9702 # Return 1 if cmpccxadd instructions can be compiled.
9703 proc check_effective_target_cmpccxadd { } {
9704 return [check_no_compiler_messages cmpccxadd object {
9705 int _cmpccxadd_epi32 (int *__A, int __B, int __C, const int __D)
9707 return (int)__builtin_ia32_cmpccxadd (__A, __B, __C, 1);
9712 # Return 1 if raoint instructions can be compiled.
9713 proc check_effective_target_raoint { } {
9714 return [check_no_compiler_messages raoint object {
9716 _aadd_si32 (int *__A, int __B)
9718 return __builtin_ia32_aadd32((int *)__A, __B);
9723 # Return 1 if sse instructions can be compiled.
9724 proc check_effective_target_sse { } {
9725 return [check_no_compiler_messages sse object {
9728 __builtin_ia32_stmxcsr ();
9734 # Return 1 if sse2 instructions can be compiled.
9735 proc check_effective_target_sse2 { } {
9736 return [check_no_compiler_messages sse2 object {
9737 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9739 __m128i _mm_srli_si128 (__m128i __A, int __N)
9741 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
9746 # Return 1 if sse4.1 instructions can be compiled.
9747 proc check_effective_target_sse4 { } {
9748 return [check_no_compiler_messages sse4.1 object {
9749 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9750 typedef int __v4si __attribute__ ((__vector_size__ (16)));
9752 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
9754 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
9760 # Return 1 if F16C instructions can be compiled.
9762 proc check_effective_target_f16c { } {
9763 return [check_no_compiler_messages f16c object {
9764 #include "immintrin.h"
9766 foo (unsigned short val)
9768 return _cvtsh_ss (val);
9773 proc check_effective_target_ms_hook_prologue { } {
9774 if { [check_no_compiler_messages ms_hook_prologue object {
9775 void __attribute__ ((__ms_hook_prologue__)) foo ();
9783 # Return 1 if 3dnow instructions can be compiled.
9784 proc check_effective_target_3dnow { } {
9785 return [check_no_compiler_messages 3dnow object {
9786 typedef int __m64 __attribute__ ((__vector_size__ (8)));
9787 typedef float __v2sf __attribute__ ((__vector_size__ (8)));
9789 __m64 _m_pfadd (__m64 __A, __m64 __B)
9791 return (__m64) __builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);
9796 # Return 1 if sse3 instructions can be compiled.
9797 proc check_effective_target_sse3 { } {
9798 return [check_no_compiler_messages sse3 object {
9799 typedef double __m128d __attribute__ ((__vector_size__ (16)));
9800 typedef double __v2df __attribute__ ((__vector_size__ (16)));
9802 __m128d _mm_addsub_pd (__m128d __X, __m128d __Y)
9804 return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
9809 # Return 1 if ssse3 instructions can be compiled.
9810 proc check_effective_target_ssse3 { } {
9811 return [check_no_compiler_messages ssse3 object {
9812 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9813 typedef int __v4si __attribute__ ((__vector_size__ (16)));
9815 __m128i _mm_abs_epi32 (__m128i __X)
9817 return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
9822 # Return 1 if aes instructions can be compiled.
9823 proc check_effective_target_aes { } {
9824 return [check_no_compiler_messages aes object {
9825 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9826 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
9828 __m128i _mm_aesimc_si128 (__m128i __X)
9830 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
9835 # Return 1 if vaes instructions can be compiled.
9836 proc check_effective_target_vaes { } {
9837 return [check_no_compiler_messages vaes object {
9838 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9839 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
9841 __m128i _mm_aesimc_si128 (__m128i __X)
9843 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
9845 } "-O2 -maes -mavx" ]
9848 # Return 1 if pclmul instructions can be compiled.
9849 proc check_effective_target_pclmul { } {
9850 return [check_no_compiler_messages pclmul object {
9851 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9852 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
9854 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
9856 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
9863 # Return 1 if vpclmul instructions can be compiled.
9864 proc check_effective_target_vpclmul { } {
9865 return [check_no_compiler_messages vpclmul object {
9866 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9867 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
9869 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
9871 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
9875 } "-O2 -mpclmul -mavx" ]
9878 # Return 1 if sse4a instructions can be compiled.
9879 proc check_effective_target_sse4a { } {
9880 return [check_no_compiler_messages sse4a object {
9881 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9882 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
9884 __m128i _mm_insert_si64 (__m128i __X,__m128i __Y)
9886 return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
9891 # Return 1 if fma4 instructions can be compiled.
9892 proc check_effective_target_fma4 { } {
9893 return [check_no_compiler_messages fma4 object {
9894 typedef float __m128 __attribute__ ((__vector_size__ (16)));
9895 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
9896 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
9898 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
9905 # Return 1 if fma instructions can be compiled.
9906 proc check_effective_target_fma { } {
9907 return [check_no_compiler_messages fma object {
9908 typedef float __m128 __attribute__ ((__vector_size__ (16)));
9909 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
9910 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
9912 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
9919 # Return 1 if xop instructions can be compiled.
9920 proc check_effective_target_xop { } {
9921 return [check_no_compiler_messages xop object {
9922 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9923 typedef short __v8hi __attribute__ ((__vector_size__ (16)));
9924 __m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
9926 return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A,
9933 # Return 1 if lzcnt instruction can be compiled.
9934 proc check_effective_target_lzcnt { } {
9935 return [check_no_compiler_messages lzcnt object {
9936 unsigned short _lzcnt (unsigned short __X)
9938 return __builtin_clzs (__X);
9943 # Return 1 if bmi instructions can be compiled.
9944 proc check_effective_target_bmi { } {
9945 return [check_no_compiler_messages bmi object {
9946 unsigned int __bextr_u32 (unsigned int __X, unsigned int __Y)
9948 return __builtin_ia32_bextr_u32 (__X, __Y);
9953 # Return 1 if ADX instructions can be compiled.
9954 proc check_effective_target_adx { } {
9955 return [check_no_compiler_messages adx object {
9957 _adxcarry_u32 (unsigned char __CF, unsigned int __X,
9958 unsigned int __Y, unsigned int *__P)
9960 return __builtin_ia32_addcarryx_u32 (__CF, __X, __Y, __P);
9965 # Return 1 if rtm instructions can be compiled.
9966 proc check_effective_target_rtm { } {
9967 return [check_no_compiler_messages rtm object {
9971 return __builtin_ia32_xend ();
9976 # Return 1 if avx512vl instructions can be compiled.
9977 proc check_effective_target_avx512vl { } {
9978 return [check_no_compiler_messages avx512vl object {
9979 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
9981 mm256_and_epi64 (__v4di __X, __v4di __Y)
9984 return __builtin_ia32_pandq256_mask (__X, __Y, __W, -1);
9989 # Return 1 if avx512cd instructions can be compiled.
9990 proc check_effective_target_avx512cd { } {
9991 return [check_no_compiler_messages avx512cd_trans object {
9992 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
9994 _mm512_conflict_epi64 (__v8di __W, __v8di __A)
9996 return (__v8di) __builtin_ia32_vpconflictdi_512_mask ((__v8di) __A,
10000 } "-Wno-psabi -mavx512cd" ]
10003 # Return 1 if avx512er instructions can be compiled.
10004 proc check_effective_target_avx512er { } {
10005 return [check_no_compiler_messages avx512er_trans object {
10006 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
10008 mm512_exp2a23_ps (__v16sf __X)
10010 return __builtin_ia32_exp2ps_mask (__X, __X, -1, 4);
10012 } "-Wno-psabi -mavx512er" ]
10015 # Return 1 if sha instructions can be compiled.
10016 proc check_effective_target_sha { } {
10017 return [check_no_compiler_messages sha object {
10018 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
10019 typedef int __v4si __attribute__ ((__vector_size__ (16)));
10021 __m128i _mm_sha1msg1_epu32 (__m128i __X, __m128i __Y)
10023 return (__m128i) __builtin_ia32_sha1msg1 ((__v4si)__X,
10029 # Return 1 if avx512dq instructions can be compiled.
10030 proc check_effective_target_avx512dq { } {
10031 return [check_no_compiler_messages avx512dq object {
10032 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
10034 _mm512_mask_mullo_epi64 (__v8di __W, __v8di __A, __v8di __B)
10036 return (__v8di) __builtin_ia32_pmullq512_mask ((__v8di) __A,
10044 # Return 1 if avx512bw instructions can be compiled.
10045 proc check_effective_target_avx512bw { } {
10046 return [check_no_compiler_messages avx512bw object {
10047 typedef short __v32hi __attribute__ ((__vector_size__ (64)));
10049 _mm512_mask_mulhrs_epi16 (__v32hi __W, __v32hi __A, __v32hi __B)
10051 return (__v32hi) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A,
10059 # Return 1 if -Wa,-march=+noavx512bw is supported.
10060 proc check_effective_target_assembler_march_noavx512bw {} {
10061 if { [istarget i?86*-*-*] || [istarget x86_64*-*-*] } {
10062 return [check_no_compiler_messages assembler_march_noavx512bw object {
10064 } "-mno-avx512bw -Wa,-march=+noavx512bw"]
10069 # Return 1 if avx512vp2intersect instructions can be compiled.
10070 proc check_effective_target_avx512vp2intersect { } {
10071 return [check_no_compiler_messages avx512vp2intersect object {
10072 typedef int __v16si __attribute__ ((__vector_size__ (64)));
10073 typedef short __mmask16;
10075 _mm512_2intersect_epi32 (__v16si __A, __v16si __B, __mmask16 *__U,
10078 __builtin_ia32_2intersectd512 (__U, __M, (__v16si) __A, (__v16si) __B);
10080 } "-mavx512vp2intersect" ]
10083 # Return 1 if avx512ifma instructions can be compiled.
10084 proc check_effective_target_avx512ifma { } {
10085 return [check_no_compiler_messages avx512ifma object {
10086 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
10088 _mm512_madd52lo_epu64 (__v8di __X, __v8di __Y, __v8di __Z)
10090 return (__v8di) __builtin_ia32_vpmadd52luq512_mask ((__v8di) __X,
10098 # Return 1 if avx512vbmi instructions can be compiled.
10099 proc check_effective_target_avx512vbmi { } {
10100 return [check_no_compiler_messages avx512vbmi object {
10101 typedef char __v64qi __attribute__ ((__vector_size__ (64)));
10103 _mm512_multishift_epi64_epi8 (__v64qi __X, __v64qi __Y)
10105 return (__v64qi) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
10113 # Return 1 if avx512_4fmaps instructions can be compiled.
10114 proc check_effective_target_avx5124fmaps { } {
10115 return [check_no_compiler_messages avx5124fmaps object {
10116 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
10117 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
10120 _mm512_mask_4fmadd_ps (__v16sf __DEST, __v16sf __A, __v16sf __B, __v16sf __C,
10121 __v16sf __D, __v16sf __E, __v4sf *__F)
10123 return (__v16sf) __builtin_ia32_4fmaddps_mask ((__v16sf) __A,
10128 (const __v4sf *) __F,
10132 } "-mavx5124fmaps" ]
10135 # Return 1 if avx512_4vnniw instructions can be compiled.
10136 proc check_effective_target_avx5124vnniw { } {
10137 return [check_no_compiler_messages avx5124vnniw object {
10138 typedef int __v16si __attribute__ ((__vector_size__ (64)));
10139 typedef int __v4si __attribute__ ((__vector_size__ (16)));
10142 _mm512_4dpwssd_epi32 (__v16si __A, __v16si __B, __v16si __C,
10143 __v16si __D, __v16si __E, __v4si *__F)
10145 return (__v16si) __builtin_ia32_vp4dpwssd ((__v16si) __B,
10150 (const __v4si *) __F);
10152 } "-mavx5124vnniw" ]
10155 # Return 1 if avx512_vpopcntdq instructions can be compiled.
10156 proc check_effective_target_avx512vpopcntdq { } {
10157 return [check_no_compiler_messages avx512vpopcntdq object {
10158 typedef int __v16si __attribute__ ((__vector_size__ (64)));
10161 _mm512_popcnt_epi32 (__v16si __A)
10163 return (__v16si) __builtin_ia32_vpopcountd_v16si ((__v16si) __A);
10165 } "-mavx512vpopcntdq" ]
10168 # Return 1 if 128 or 256-bit avx512_vpopcntdq instructions can be compiled.
10169 proc check_effective_target_avx512vpopcntdqvl { } {
10170 return [check_no_compiler_messages avx512vpopcntdqvl object {
10171 typedef int __v8si __attribute__ ((__vector_size__ (32)));
10174 _mm256_popcnt_epi32 (__v8si __A)
10176 return (__v8si) __builtin_ia32_vpopcountd_v8si ((__v8si) __A);
10178 } "-mavx512vpopcntdq -mavx512vl" ]
10181 # Return 1 if gfni instructions can be compiled.
10182 proc check_effective_target_gfni { } {
10183 return [check_no_compiler_messages gfni object {
10184 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
10187 _mm_gf2p8affineinv_epi64_epi8 (__v16qi __A, __v16qi __B, const int __C)
10189 return (__v16qi) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A,
10196 # Return 1 if avx512vbmi2 instructions can be compiled.
10197 proc check_effective_target_avx512vbmi2 { } {
10198 return [check_no_compiler_messages avx512vbmi2 object {
10199 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
10200 typedef unsigned long long __mmask16;
10203 _mm_mask_compress_epi8 (__v16qi __A, __mmask16 __B, __v16qi __C)
10205 return (__v16qi) __builtin_ia32_compressqi128_mask((__v16qi)__C,
10209 } "-mavx512vbmi2 -mavx512vl" ]
10212 # Return 1 if avx512vbmi2 instructions can be compiled.
10213 proc check_effective_target_avx512vnni { } {
10214 return [check_no_compiler_messages avx512vnni object {
10215 typedef int __v16si __attribute__ ((__vector_size__ (64)));
10218 _mm_mask_compress_epi8 (__v16si __A, __v16si __B, __v16si __C)
10220 return (__v16si) __builtin_ia32_vpdpbusd_v16si ((__v16si)__A,
10224 } "-mavx512vnni -mavx512f" ]
10227 # Return 1 if vaes instructions can be compiled.
10228 proc check_effective_target_avx512vaes { } {
10229 return [check_no_compiler_messages avx512vaes object {
10231 typedef int __v16si __attribute__ ((__vector_size__ (64)));
10234 _mm256_aesdec_epi128 (__v32qi __A, __v32qi __B)
10236 return (__v32qi)__builtin_ia32_vaesdec_v32qi ((__v32qi) __A, (__v32qi) __B);
10241 # Return 1 if amx-tile instructions can be compiled.
10242 proc check_effective_target_amx_tile { } {
10243 return [check_no_compiler_messages amx_tile object {
10247 __asm__ volatile ("tilerelease" ::);
10252 # Return 1 if amx-int8 instructions can be compiled.
10253 proc check_effective_target_amx_int8 { } {
10254 return [check_no_compiler_messages amx_int8 object {
10258 __asm__ volatile ("tdpbssd\t%%tmm1, %%tmm2, %%tmm3" ::);
10263 # Return 1 if amx-bf16 instructions can be compiled.
10264 proc check_effective_target_amx_bf16 { } {
10265 return [check_no_compiler_messages amx_bf16 object {
10269 __asm__ volatile ("tdpbf16ps\t%%tmm1, %%tmm2, %%tmm3" ::);
10274 # Return 1 if amx-fp16 instructions can be compiled.
10275 proc check_effective_target_amx_fp16 { } {
10276 return [check_no_compiler_messages amx_fp16 object {
10280 __asm__ volatile ("tdpfp16ps\t%%tmm1, %%tmm2, %%tmm3" ::);
10285 # Return 1 if vpclmulqdq instructions can be compiled.
10286 proc check_effective_target_vpclmulqdq { } {
10287 return [check_no_compiler_messages vpclmulqdq object {
10288 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
10291 _mm256_clmulepi64_epi128 (__v4di __A, __v4di __B)
10293 return (__v4di) __builtin_ia32_vpclmulqdq_v4di (__A, __B, 0);
10295 } "-mvpclmulqdq -mavx512vl" ]
10298 # Return 1 if avx512_bitalg instructions can be compiled.
10299 proc check_effective_target_avx512bitalg { } {
10300 return [check_no_compiler_messages avx512bitalg object {
10301 typedef short int __v32hi __attribute__ ((__vector_size__ (64)));
10304 _mm512_popcnt_epi16 (__v32hi __A)
10306 return (__v32hi) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
10308 } "-mavx512bitalg" ]
10311 # Return 1 if C wchar_t type is compatible with char16_t.
10313 proc check_effective_target_wchar_t_char16_t_compatible { } {
10314 return [check_no_compiler_messages wchar_t_char16_t object {
10316 __CHAR16_TYPE__ *p16 = &wc;
10317 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
10321 # Return 1 if C wchar_t type is compatible with char32_t.
10323 proc check_effective_target_wchar_t_char32_t_compatible { } {
10324 return [check_no_compiler_messages wchar_t_char32_t object {
10326 __CHAR32_TYPE__ *p32 = &wc;
10327 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
10331 # Return 1 if pow10 function exists.
10333 proc check_effective_target_pow10 { } {
10334 return [check_runtime pow10 {
10344 # Return 1 if frexpl function exists.
10346 proc check_effective_target_frexpl { } {
10347 return [check_runtime frexpl {
10352 x = frexpl (5.0, &y);
10359 # Return 1 if issignaling function exists.
10360 proc check_effective_target_issignaling {} {
10361 return [check_runtime issignaling {
10362 #define _GNU_SOURCE
10366 return issignaling (0.0);
10371 # Return 1 if current options generate DFP instructions, 0 otherwise.
10372 proc check_effective_target_hard_dfp {} {
10373 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
10374 typedef float d64 __attribute__((mode(DD)));
10376 void foo (void) { z = x + y; }
10380 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
10381 # for strchr etc. functions.
10383 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
10384 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
10385 #include <string.h>
10387 #if !defined(__cplusplus) \
10388 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
10389 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
10390 ISO C++ correct string.h and wchar.h protos not supported.
10397 # Return 1 if GNU as is used.
10399 proc check_effective_target_gas { } {
10400 global use_gas_saved
10403 if {![info exists use_gas_saved]} {
10404 # Check if the as used by gcc is GNU as.
10405 set options [list "additional_flags=-print-prog-name=as"]
10406 set gcc_as [lindex [${tool}_target_compile "" "" "none" $options] 0]
10407 # Provide /dev/null as input, otherwise gas times out reading from
10409 set status [remote_exec host "$gcc_as" "-v /dev/null"]
10410 set as_output [lindex $status 1]
10411 if { [ string first "GNU" $as_output ] >= 0 } {
10412 # Some Darwin versions have an assembler which is based on an old
10413 # version of GAS (and reports GNU assembler in its -v output) but
10414 #Â but doesn't support many of the modern GAS features.
10415 if { [ string first "cctools" $as_output ] >= 0 } {
10416 set use_gas_saved 0
10418 set use_gas_saved 1
10421 set use_gas_saved 0
10424 return $use_gas_saved
10427 # Return 1 if GNU ld is used.
10429 proc check_effective_target_gld { } {
10430 global use_gld_saved
10433 if {![info exists use_gld_saved]} {
10434 # Check if the ld used by gcc is GNU ld.
10435 set options [list "additional_flags=-print-prog-name=ld"]
10436 set gcc_ld [lindex [${tool}_target_compile "" "" "none" $options] 0]
10437 set status [remote_exec host "$gcc_ld" "--version"]
10438 set ld_output [lindex $status 1]
10439 if { [ string first "GNU" $ld_output ] >= 0 } {
10440 set use_gld_saved 1
10442 set use_gld_saved 0
10445 return $use_gld_saved
10448 # Return 1 if the compiler has been configure with link-time optimization
10451 proc check_effective_target_lto { } {
10452 if { [istarget *-*-vxworks*] } {
10453 # No LTO on VxWorks, with kernel modules
10454 # built with partial links
10457 if { [istarget nvptx-*-*]
10458 || [istarget amdgcn-*-*] } {
10461 return [check_no_compiler_messages lto object {
10462 void foo (void) { }
10466 # Return 1 if the compiler and linker support incremental link-time
10469 proc check_effective_target_lto_incremental { } {
10470 if ![check_effective_target_lto] {
10473 return [check_no_compiler_messages lto_incremental executable {
10474 int main () { return 0; }
10475 } "-flto -r -nostdlib"]
10478 # Return 1 if the compiler has been configured with analyzer support.
10480 proc check_effective_target_analyzer { } {
10481 return [check_no_compiler_messages analyzer object {
10482 void foo (void) { }
10486 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
10488 proc check_effective_target_maybe_x32 { } {
10489 return [check_no_compiler_messages maybe_x32 object {
10491 } "-mx32 -maddress-mode=short"]
10494 # Return 1 if this target supports the -fsplit-stack option, 0
10497 proc check_effective_target_split_stack {} {
10498 return [check_no_compiler_messages split_stack object {
10499 void foo (void) { }
10503 # Return 1 if this target supports the -masm=intel option, 0
10506 proc check_effective_target_masm_intel {} {
10507 return [check_no_compiler_messages masm_intel object {
10508 extern void abort (void);
10512 # Return 1 if the language for the compiler under test is C.
10514 proc check_effective_target_c { } {
10516 if [string match $tool "gcc"] {
10522 # Return 1 if the language for the compiler under test is C++.
10524 proc check_effective_target_c++ { } {
10526 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
10532 set cxx_default "c++17"
10533 # Check whether the current active language standard supports the features
10534 # of C++11/C++14 by checking for the presence of one of the -std flags.
10535 # This assumes that the default for the compiler is $cxx_default, and that
10536 # there will never be multiple -std= arguments on the command line.
10537 proc check_effective_target_c++11_only { } {
10539 if ![check_effective_target_c++] {
10542 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
10545 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
10550 proc check_effective_target_c++11 { } {
10551 if [check_effective_target_c++11_only] {
10554 return [check_effective_target_c++14]
10556 proc check_effective_target_c++11_down { } {
10557 if ![check_effective_target_c++] {
10560 return [expr ![check_effective_target_c++14] ]
10563 proc check_effective_target_c++14_only { } {
10565 if ![check_effective_target_c++] {
10568 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
10571 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
10577 proc check_effective_target_c++14 { } {
10578 if [check_effective_target_c++14_only] {
10581 return [check_effective_target_c++17]
10583 proc check_effective_target_c++14_down { } {
10584 if ![check_effective_target_c++] {
10587 return [expr ![check_effective_target_c++17] ]
10590 proc check_effective_target_c++98_only { } {
10592 if ![check_effective_target_c++] {
10595 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
10598 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
10604 proc check_effective_target_c++17_only { } {
10606 if ![check_effective_target_c++] {
10609 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
10612 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
10618 proc check_effective_target_c++17 { } {
10619 if [check_effective_target_c++17_only] {
10622 return [check_effective_target_c++2a]
10624 proc check_effective_target_c++17_down { } {
10625 if ![check_effective_target_c++] {
10628 return [expr ![check_effective_target_c++2a] ]
10631 proc check_effective_target_c++2a_only { } {
10633 if ![check_effective_target_c++] {
10636 if [check-flags { { } { } { -std=c++2a -std=gnu++2a -std=c++20 -std=gnu++20 } }] {
10639 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
10644 proc check_effective_target_c++2a { } {
10645 if [check_effective_target_c++2a_only] {
10648 return [check_effective_target_c++23]
10651 proc check_effective_target_c++20_only { } {
10652 return [check_effective_target_c++2a_only]
10655 proc check_effective_target_c++20 { } {
10656 return [check_effective_target_c++2a]
10658 proc check_effective_target_c++20_down { } {
10659 if ![check_effective_target_c++] {
10662 return [expr ![check_effective_target_c++23] ]
10665 proc check_effective_target_c++23_only { } {
10667 if ![check_effective_target_c++] {
10670 if [check-flags { { } { } { -std=c++23 -std=gnu++23 -std=c++2b -std=gnu++2b } }] {
10673 if { $cxx_default == "c++23" && [check-flags { { } { } { } { -std=* } }] } {
10678 proc check_effective_target_c++23 { } {
10679 return [check_effective_target_c++23_only]
10682 # Check for C++ Concepts support, i.e. -fconcepts flag.
10683 proc check_effective_target_concepts { } {
10684 if [check_effective_target_c++2a] {
10687 return [check-flags { "" { } { -fconcepts } }]
10690 proc check_effective_target_implicit_constexpr { } {
10691 return [check-flags { "" { } { -fimplicit-constexpr } }]
10694 # Return 1 if expensive testcases should be run.
10696 proc check_effective_target_run_expensive_tests { } {
10697 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
10703 # Returns 1 if "mempcpy" is available on the target system.
10705 proc check_effective_target_mempcpy {} {
10706 if { [istarget *-*-vxworks*] } {
10707 # VxWorks doesn't have mempcpy but our way to test fails
10708 # to detect as we're doing partial links for kernel modules.
10711 return [check_function_available "mempcpy"]
10714 # Returns 1 if "stpcpy" is available on the target system.
10716 proc check_effective_target_stpcpy {} {
10717 return [check_function_available "stpcpy"]
10720 # Returns 1 if "sigsetjmp" is available on the target system.
10721 # Also check if "__sigsetjmp" is defined since that's what glibc
10724 proc check_effective_target_sigsetjmp {} {
10725 if { [check_function_available "sigsetjmp"]
10726 || [check_function_available "__sigsetjmp"] } {
10732 # Check whether the vectorizer tests are supported by the target and
10733 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
10734 # If a port wants to execute the tests more than once it should append
10735 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
10736 # will be added by a call to add_options_for_<target>.
10737 # Set dg-do-what-default to either compile or run, depending on target
10738 # capabilities. Do not set this if the supported target is appended to
10739 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
10740 # automatically. Return the number of effective targets if vectorizer tests
10741 # are supported, 0 otherwise.
10743 proc check_vect_support_and_set_flags { } {
10744 global DEFAULT_VECTCFLAGS
10745 global dg-do-what-default
10746 global EFFECTIVE_TARGETS
10748 if [istarget powerpc-*paired*] {
10749 lappend DEFAULT_VECTCFLAGS "-mpaired"
10750 if [check_750cl_hw_available] {
10751 set dg-do-what-default run
10753 set dg-do-what-default compile
10755 } elseif [istarget powerpc*-*-*] {
10756 # Skip targets not supporting -maltivec.
10757 if ![is-effective-target powerpc_altivec_ok] {
10761 lappend DEFAULT_VECTCFLAGS "-maltivec"
10762 if [check_p9vector_hw_available] {
10763 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
10764 } elseif [check_p8vector_hw_available] {
10765 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
10766 } elseif [check_vsx_hw_available] {
10767 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
10770 if [check_vmx_hw_available] {
10771 set dg-do-what-default run
10773 if [is-effective-target ilp32] {
10774 # Specify a cpu that supports VMX for compile-only tests.
10775 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
10777 set dg-do-what-default compile
10779 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
10780 lappend DEFAULT_VECTCFLAGS "-msse2"
10781 if { [check_effective_target_sse2_runtime] } {
10782 set dg-do-what-default run
10784 set dg-do-what-default compile
10786 } elseif { [istarget mips*-*-*]
10787 && [check_effective_target_nomips16] } {
10788 if { [check_effective_target_mpaired_single "-mpaired-single"] } {
10789 lappend EFFECTIVE_TARGETS mpaired_single
10791 if { [check_effective_target_mips_loongson_mmi "-mloongson-mmi"] } {
10792 lappend EFFECTIVE_TARGETS mips_loongson_mmi
10794 if { [check_effective_target_mips_msa "-mmsa"] } {
10795 lappend EFFECTIVE_TARGETS mips_msa
10797 return [llength $EFFECTIVE_TARGETS]
10798 } elseif [istarget sparc*-*-*] {
10799 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
10800 if [check_effective_target_ultrasparc_hw] {
10801 set dg-do-what-default run
10803 set dg-do-what-default compile
10805 } elseif [istarget alpha*-*-*] {
10806 # Alpha's vectorization capabilities are extremely limited.
10807 # It's more effort than its worth disabling all of the tests
10808 # that it cannot pass. But if you actually want to see what
10809 # does work, command out the return.
10812 lappend DEFAULT_VECTCFLAGS "-mmax"
10813 if [check_alpha_max_hw_available] {
10814 set dg-do-what-default run
10816 set dg-do-what-default compile
10818 } elseif [istarget ia64-*-*] {
10819 set dg-do-what-default run
10820 } elseif [is-effective-target arm_neon_ok] {
10821 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
10822 # NEON does not support denormals, so is not used for vectorization by
10823 # default to avoid loss of precision. We must pass -ffast-math to test
10824 # vectorization of float operations.
10825 lappend DEFAULT_VECTCFLAGS "-ffast-math"
10826 if [is-effective-target arm_neon_hw] {
10827 set dg-do-what-default run
10829 set dg-do-what-default compile
10831 } elseif [istarget "aarch64*-*-*"] {
10832 set dg-do-what-default run
10833 } elseif [istarget s390*-*-*] {
10834 # The S/390 backend set a default of 2 for that value.
10835 # Override it to have the same situation as with other
10837 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
10838 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
10839 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
10840 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
10841 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
10842 if [check_effective_target_s390_vxe2] {
10843 lappend DEFAULT_VECTCFLAGS "-march=z15" "-mzarch"
10844 set dg-do-what-default run
10845 } elseif [check_effective_target_s390_vxe] {
10846 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
10847 set dg-do-what-default run
10848 } elseif [check_effective_target_s390_vx] {
10849 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
10850 set dg-do-what-default run
10852 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
10853 set dg-do-what-default compile
10855 } elseif [istarget amdgcn-*-*] {
10856 set dg-do-what-default run
10864 # Return 1 if the target does *not* require strict alignment.
10866 proc check_effective_target_non_strict_align {} {
10868 # On ARM, the default is to use STRICT_ALIGNMENT, but there
10869 # are interfaces defined for misaligned access and thus
10870 # depending on the architecture levels unaligned access is
10872 if [istarget "arm*-*-*"] {
10873 return [check_effective_target_arm_unaligned]
10876 return [check_no_compiler_messages non_strict_align assembly {
10878 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
10880 void foo(void) { z = (c *) y; }
10884 # Return 1 if the target has <ucontext.h>.
10886 proc check_effective_target_ucontext_h { } {
10887 return [check_no_compiler_messages ucontext_h assembly {
10888 #include <ucontext.h>
10892 proc check_effective_target_aarch64_tiny { } {
10893 if { [istarget aarch64*-*-*] } {
10894 return [check_no_compiler_messages aarch64_tiny object {
10895 #ifdef __AARCH64_CMODEL_TINY__
10898 #error target not AArch64 tiny code model
10906 # Create functions to check that the AArch64 assembler supports the
10907 # various architecture extensions via the .arch_extension pseudo-op.
10909 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"
10910 "i8mm" "f32mm" "f64mm" "bf16" "sb" "sve2" } {
10911 eval [string map [list FUNC $aarch64_ext] {
10912 proc check_effective_target_aarch64_asm_FUNC_ok { } {
10913 if { [istarget aarch64*-*-*] } {
10914 return [check_no_compiler_messages aarch64_FUNC_assembler object {
10915 __asm__ (".arch_extension FUNC");
10916 } "-march=armv8-a+FUNC"]
10924 proc check_effective_target_aarch64_small { } {
10925 if { [istarget aarch64*-*-*] } {
10926 return [check_no_compiler_messages aarch64_small object {
10927 #ifdef __AARCH64_CMODEL_SMALL__
10930 #error target not AArch64 small code model
10938 proc check_effective_target_aarch64_large { } {
10939 if { [istarget aarch64*-*-*] } {
10940 return [check_no_compiler_messages aarch64_large object {
10941 #ifdef __AARCH64_CMODEL_LARGE__
10944 #error target not AArch64 large code model
10952 # Return 1 if the assembler accepts the aarch64 .variant_pcs directive.
10954 proc check_effective_target_aarch64_variant_pcs { } {
10955 if { [istarget aarch64*-*-*] } {
10956 return [check_no_compiler_messages aarch64_variant_pcs object {
10957 __asm__ (".variant_pcs foo");
10964 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
10965 # register set, instruction set, addressing capabilities and ABI.
10967 proc check_effective_target_avr_tiny { } {
10968 if { [istarget avr*-*-*] } {
10969 return [check_no_compiler_messages avr_tiny object {
10970 #ifdef __AVR_TINY__
10973 #error target not a reduced AVR Tiny core
10981 # Return 1 if <fenv.h> is available.
10983 proc check_effective_target_fenv {} {
10984 return [check_no_compiler_messages fenv object {
10986 } [add_options_for_ieee "-std=gnu99"]]
10989 # Return 1 if <fenv.h> is available with all the standard IEEE
10990 # exceptions and floating-point exceptions are raised by arithmetic
10991 # operations. (If the target requires special options for "inexact"
10992 # exceptions, those need to be specified in the testcases.)
10994 proc check_effective_target_fenv_exceptions {} {
10995 return [check_runtime fenv_exceptions {
10997 #include <stdlib.h>
10998 #ifndef FE_DIVBYZERO
10999 # error Missing FE_DIVBYZERO
11002 # error Missing FE_INEXACT
11005 # error Missing FE_INVALID
11007 #ifndef FE_OVERFLOW
11008 # error Missing FE_OVERFLOW
11010 #ifndef FE_UNDERFLOW
11011 # error Missing FE_UNDERFLOW
11013 volatile float a = 0.0f, r;
11018 if (fetestexcept (FE_INVALID))
11023 } [add_options_for_ieee "-std=gnu99"]]
11026 # Return 1 if <fenv.h> is available with all the standard IEEE
11027 # exceptions and floating-point exceptions are raised by arithmetic
11028 # operations for decimal floating point. (If the target requires
11029 # special options for "inexact" exceptions, those need to be specified
11030 # in the testcases.)
11032 proc check_effective_target_fenv_exceptions_dfp {} {
11033 return [check_runtime fenv_exceptions_dfp {
11035 #include <stdlib.h>
11036 #ifndef FE_DIVBYZERO
11037 # error Missing FE_DIVBYZERO
11040 # error Missing FE_INEXACT
11043 # error Missing FE_INVALID
11045 #ifndef FE_OVERFLOW
11046 # error Missing FE_OVERFLOW
11048 #ifndef FE_UNDERFLOW
11049 # error Missing FE_UNDERFLOW
11051 volatile _Decimal64 a = 0.0DD, r;
11056 if (fetestexcept (FE_INVALID))
11061 } [add_options_for_ieee "-std=gnu99"]]
11064 # Return 1 if <fenv.h> is available with all the standard IEEE
11065 # exceptions and floating-point exceptions are raised by arithmetic
11066 # operations. (If the target requires special options for "inexact"
11067 # exceptions, those need to be specified in the testcases.)
11069 proc check_effective_target_fenv_exceptions_double {} {
11070 return [check_runtime fenv_exceptions_double {
11072 #include <stdlib.h>
11073 #ifndef FE_DIVBYZERO
11074 # error Missing FE_DIVBYZERO
11077 # error Missing FE_INEXACT
11080 # error Missing FE_INVALID
11082 #ifndef FE_OVERFLOW
11083 # error Missing FE_OVERFLOW
11085 #ifndef FE_UNDERFLOW
11086 # error Missing FE_UNDERFLOW
11088 volatile double a = 0.0f, r;
11093 if (fetestexcept (FE_INVALID))
11098 } [add_options_for_ieee "-std=gnu99"]]
11101 # Return 1 if <fenv.h> is available with all the standard IEEE
11102 # exceptions and floating-point exceptions are raised by arithmetic
11103 # operations. (If the target requires special options for "inexact"
11104 # exceptions, those need to be specified in the testcases.)
11106 proc check_effective_target_fenv_exceptions_long_double {} {
11107 return [check_runtime fenv_exceptions_long_double {
11109 #include <stdlib.h>
11110 #ifndef FE_DIVBYZERO
11111 # error Missing FE_DIVBYZERO
11114 # error Missing FE_INEXACT
11117 # error Missing FE_INVALID
11119 #ifndef FE_OVERFLOW
11120 # error Missing FE_OVERFLOW
11122 #ifndef FE_UNDERFLOW
11123 # error Missing FE_UNDERFLOW
11125 volatile long double a = 0.0f, r;
11130 if (fetestexcept (FE_INVALID))
11135 } [add_options_for_ieee "-std=gnu99"]]
11138 # Return 1 if -fexceptions is supported.
11140 proc check_effective_target_exceptions {} {
11141 if { [istarget amdgcn*-*-*] } {
11147 # Used to check if the testing configuration supports exceptions.
11148 # Returns 0 if exceptions are unsupported or disabled (e.g. by passing
11149 # -fno-exceptions). Returns 1 if exceptions are enabled.
11150 proc check_effective_target_exceptions_enabled {} {
11151 return [check_cached_effective_target exceptions_enabled {
11152 if { [check_effective_target_exceptions] } {
11153 return [check_no_compiler_messages exceptions_enabled assembly {
11161 # If exceptions aren't supported, then they're not enabled.
11167 proc check_effective_target_tiny {} {
11168 return [check_cached_effective_target tiny {
11169 if { [istarget aarch64*-*-*]
11170 && [check_effective_target_aarch64_tiny] } {
11173 if { [istarget avr-*-*]
11174 && [check_effective_target_avr_tiny] } {
11177 # PRU Program Counter is 16-bits, and trampolines are not supported.
11178 # Hence directly declare as a tiny target.
11179 if [istarget pru-*-*] {
11186 # Return 1 if the target supports -mbranch-cost=N option.
11188 proc check_effective_target_branch_cost {} {
11189 if { [ istarget arm*-*-*]
11190 || [istarget avr*-*-*]
11191 || [istarget csky*-*-*]
11192 || [istarget epiphany*-*-*]
11193 || [istarget frv*-*-*]
11194 || [istarget i?86-*-*] || [istarget x86_64-*-*]
11195 || [istarget loongarch*-*-*]
11196 || [istarget mips*-*-*]
11197 || [istarget s390*-*-*]
11198 || [istarget riscv*-*-*]
11199 || [istarget sh*-*-*] } {
11205 # Record that dg-final test TEST requires convential compilation.
11207 proc force_conventional_output_for { test } {
11208 if { [info proc $test] == "" } {
11209 perror "$test does not exist"
11212 proc ${test}_required_options {} {
11213 global gcc_force_conventional_output
11214 upvar 1 extra_tool_flags extra_tool_flags
11215 if {[regexp -- "^scan-assembler" [info level 0]]
11216 && ![string match "*-fident*" $extra_tool_flags]} {
11217 # Do not let .ident confuse assembler scan tests
11218 return [list $gcc_force_conventional_output "-fno-ident"]
11220 return $gcc_force_conventional_output
11224 # Record that dg-final test scan-ltrans-tree-dump* requires -flto-partition=one
11225 # in order to force a single partition, allowing scan-ltrans-tree-dump* to scan
11226 # a dump file *.exe.ltrans0.*.
11228 proc scan-ltrans-tree-dump_required_options {} {
11229 return "-flto-partition=one"
11231 proc scan-ltrans-tree-dump-times_required_options {} {
11232 return "-flto-partition=one"
11234 proc scan-ltrans-tree-dump-not_required_options {} {
11235 return "-flto-partition=one"
11237 proc scan-ltrans-tree-dump-dem_required_options {} {
11238 return "-flto-partition=one"
11240 proc scan-ltrans-tree-dump-dem-not_required_options {} {
11241 return "-flto-partition=one"
11244 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
11245 # otherwise. Cache the result.
11247 proc check_effective_target_pie_copyreloc { } {
11249 global GCC_UNDER_TEST
11251 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
11255 # Need auto-host.h to check linker support.
11256 if { ![file exists ../../auto-host.h ] } {
11260 return [check_cached_effective_target pie_copyreloc {
11261 # Set up and compile to see if linker supports PIE with copy
11262 # reloc. Include the current process ID in the file names to
11263 # prevent conflicts with invocations for multiple testsuites.
11268 set f [open $src "w"]
11269 puts $f "#include \"../../auto-host.h\""
11270 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
11271 puts $f "# error Linker does not support PIE with copy reloc."
11275 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
11276 set lines [${tool}_target_compile $src $obj object ""]
11281 if [string match "" $lines] then {
11282 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
11285 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
11291 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
11292 # otherwise. Cache the result.
11294 proc check_effective_target_got32x_reloc { } {
11296 global GCC_UNDER_TEST
11298 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
11302 # Need auto-host.h to check linker support.
11303 if { ![file exists ../../auto-host.h ] } {
11307 return [check_cached_effective_target got32x_reloc {
11308 # Include the current process ID in the file names to prevent
11309 # conflicts with invocations for multiple testsuites.
11311 set src got32x[pid].c
11312 set obj got32x[pid].o
11314 set f [open $src "w"]
11315 puts $f "#include \"../../auto-host.h\""
11316 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
11317 puts $f "# error Assembler does not support R_386_GOT32X."
11321 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
11322 set lines [${tool}_target_compile $src $obj object ""]
11327 if [string match "" $lines] then {
11328 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
11331 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
11336 return $got32x_reloc_available_saved
11339 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
11340 # 0 otherwise. Cache the result.
11342 proc check_effective_target_tls_get_addr_via_got { } {
11344 global GCC_UNDER_TEST
11346 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
11350 # Need auto-host.h to check linker support.
11351 if { ![file exists ../../auto-host.h ] } {
11355 return [check_cached_effective_target tls_get_addr_via_got {
11356 # Include the current process ID in the file names to prevent
11357 # conflicts with invocations for multiple testsuites.
11359 set src tls_get_addr_via_got[pid].c
11360 set obj tls_get_addr_via_got[pid].o
11362 set f [open $src "w"]
11363 puts $f "#include \"../../auto-host.h\""
11364 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
11365 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
11369 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
11370 set lines [${tool}_target_compile $src $obj object ""]
11375 if [string match "" $lines] then {
11376 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
11379 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
11385 # Return 1 if the target uses comdat groups.
11387 proc check_effective_target_comdat_group {} {
11388 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat|\.group\[^\n\r]*,#comdat" assembly {
11390 inline int foo () { return 1; }
11391 int (*fn) () = foo;
11395 # Return 1 if target supports __builtin_eh_return
11396 proc check_effective_target_builtin_eh_return { } {
11397 return [check_no_compiler_messages builtin_eh_return object {
11398 void test (long l, void *p)
11400 __builtin_eh_return (l, p);
11405 # Return 1 if the target supports max reduction for vectors.
11407 proc check_effective_target_vect_max_reduc { } {
11408 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
11414 # Return 1 if the compiler has been configured with nvptx offloading.
11416 proc check_effective_target_offload_nvptx { } {
11417 return [check_no_compiler_messages offload_nvptx assembly {
11418 int main () {return 0;}
11419 } "-foffload=nvptx-none" ]
11422 # Return 1 if the compiler has been configured with gcn offloading.
11424 proc check_effective_target_offload_gcn { } {
11425 return [check_no_compiler_messages offload_gcn assembly {
11426 int main () {return 0;}
11427 } "-foffload=amdgcn-amdhsa" ]
11430 # Return 1 if the target support -fprofile-update=atomic
11431 proc check_effective_target_profile_update_atomic {} {
11432 return [check_no_compiler_messages profile_update_atomic assembly {
11433 int main (void) { return 0; }
11434 } "-fprofile-update=atomic -fprofile-generate"]
11437 # Return 1 if vector (va - vector add) instructions are understood by
11438 # the assembler and can be executed. This also covers checking for
11439 # the VX kernel feature. A kernel without that feature does not
11440 # enable the vector facility and the following check will die with a
11442 proc check_effective_target_s390_vx { } {
11443 if ![istarget s390*-*-*] then {
11447 return [check_runtime s390_check_vx {
11450 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
11453 } "-march=z13 -mzarch" ]
11456 # Same as above but for the z14 vector enhancement facility. Test
11457 # is performed with the vector nand instruction.
11458 proc check_effective_target_s390_vxe { } {
11459 if ![istarget s390*-*-*] then {
11463 return [check_runtime s390_check_vxe {
11466 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
11469 } "-march=z14 -mzarch" ]
11472 # Same as above but for the arch13 vector enhancement facility. Test
11473 # is performed with the vector shift left double by bit instruction.
11474 proc check_effective_target_s390_vxe2 { } {
11475 if ![istarget s390*-*-*] then {
11479 return [check_runtime s390_check_vxe2 {
11482 asm ("vsld %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
11485 } "-march=arch13 -mzarch" ]
11488 # Same as above but for the arch14 NNPA facility.
11489 proc check_effective_target_s390_nnpa { } {
11490 if ![istarget s390*-*-*] then {
11494 return [check_runtime s390_check_nnpa {
11497 asm ("vzero %%v24\n\t"
11498 "vcrnf %%v24,%%v24,%%v24,0,2" : : : "v24");
11501 } "-march=arch14 -mzarch" ]
11504 #For versions of ARM architectures that have hardware div insn,
11505 #disable the divmod transform
11507 proc check_effective_target_arm_divmod_simode { } {
11508 return [check_no_compiler_messages arm_divmod assembly {
11509 #ifdef __ARM_ARCH_EXT_IDIV__
11510 #error has div insn
11516 # Return 1 if target supports divmod hardware insn or divmod libcall.
11518 proc check_effective_target_divmod { } {
11519 #TODO: Add checks for all targets that have either hardware divmod insn
11520 # or define libfunc for divmod.
11521 if { [istarget arm*-*-*]
11522 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
11528 # Return 1 if target supports divmod for SImode. The reason for
11529 # separating this from check_effective_target_divmod is that
11530 # some versions of ARM architecture define div instruction
11531 # only for simode, and for these archs, we do not want to enable
11532 # divmod transform for simode.
11534 proc check_effective_target_divmod_simode { } {
11535 if { [istarget arm*-*-*] } {
11536 return [check_effective_target_arm_divmod_simode]
11539 return [check_effective_target_divmod]
11542 # Return 1 if store merging optimization is applicable for target.
11543 # Store merging is not profitable for targets like the avr which
11544 # can load/store only one byte at a time. Use int size as a proxy
11545 # for the number of bytes the target can write, and skip for targets
11546 # with a smallish (< 32) size.
11548 proc check_effective_target_store_merge { } {
11549 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
11556 # Return 1 if we're able to assemble rdrand
11558 proc check_effective_target_rdrand { } {
11559 return [check_no_compiler_messages_nocache rdrand object {
11564 __builtin_ia32_rdrand32_step(&val);
11570 # Return 1 if the target supports coprocessor instructions: cdp, ldc, ldcl,
11571 # stc, stcl, mcr and mrc.
11572 proc check_effective_target_arm_coproc1_ok_nocache { } {
11573 if { ![istarget arm*-*-*] } {
11576 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
11577 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
11580 #include <arm_acle.h>
11584 proc check_effective_target_arm_coproc1_ok { } {
11585 return [check_cached_effective_target arm_coproc1_ok \
11586 check_effective_target_arm_coproc1_ok_nocache]
11589 # Return 1 if the target supports all coprocessor instructions checked by
11590 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
11591 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
11592 proc check_effective_target_arm_coproc2_ok_nocache { } {
11593 if { ![check_effective_target_arm_coproc1_ok] } {
11596 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
11597 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 5
11600 #include <arm_acle.h>
11604 proc check_effective_target_arm_coproc2_ok { } {
11605 return [check_cached_effective_target arm_coproc2_ok \
11606 check_effective_target_arm_coproc2_ok_nocache]
11609 # Return 1 if the target supports all coprocessor instructions checked by
11610 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
11612 proc check_effective_target_arm_coproc3_ok_nocache { } {
11613 if { ![check_effective_target_arm_coproc2_ok] } {
11616 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
11617 #if (__thumb__ && !__thumb2__) \
11618 || (__ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__))
11621 #include <arm_acle.h>
11625 proc check_effective_target_arm_coproc3_ok { } {
11626 return [check_cached_effective_target arm_coproc3_ok \
11627 check_effective_target_arm_coproc3_ok_nocache]
11630 # Return 1 if the target supports all coprocessor instructions checked by
11631 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
11633 proc check_effective_target_arm_coproc4_ok_nocache { } {
11634 if { ![check_effective_target_arm_coproc3_ok] } {
11637 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
11638 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 6
11641 #include <arm_acle.h>
11645 proc check_effective_target_arm_coproc4_ok { } {
11646 return [check_cached_effective_target arm_coproc4_ok \
11647 check_effective_target_arm_coproc4_ok_nocache]
11650 # Return 1 if the target supports the auto_inc_dec optimization pass.
11651 proc check_effective_target_autoincdec { } {
11652 if { ![check_no_compiler_messages auto_incdec assembly { void f () { }
11653 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
11657 set dumpfile [glob -nocomplain "auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
11658 if { [file exists $dumpfile ] } {
11659 file delete $dumpfile
11665 # Return 1 if the target has support for stack probing designed
11666 # to avoid stack-clash style attacks.
11668 # This is used to restrict the stack-clash mitigation tests to
11669 # just those targets that have been explicitly supported.
11671 # In addition to the prologue work on those targets, each target's
11672 # properties should be described in the functions below so that
11673 # tests do not become a mess of unreadable target conditions.
11675 proc check_effective_target_supports_stack_clash_protection { } {
11677 if { [istarget x86_64-*-*] || [istarget i?86-*-*]
11678 || [istarget powerpc*-*-*] || [istarget rs6000*-*-*]
11679 || [istarget aarch64*-**] || [istarget s390*-*-*]
11680 || [istarget loongarch64*-**] } {
11686 # Return 1 if the target creates a frame pointer for non-leaf functions
11687 # Note we ignore cases where we apply tail call optimization here.
11688 proc check_effective_target_frame_pointer_for_non_leaf { } {
11689 # Solaris/x86 defaults to -fno-omit-frame-pointer.
11690 if { [istarget i?86-*-solaris*] || [istarget x86_64-*-solaris*] } {
11697 # Return 1 if the target's calling sequence or its ABI
11698 # create implicit stack probes at or prior to function entry.
11699 proc check_effective_target_caller_implicit_probes { } {
11701 # On x86/x86_64 the call instruction itself pushes the return
11702 # address onto the stack. That is an implicit probe of *sp.
11703 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
11707 # On PPC, the ABI mandates that the address of the outer
11708 # frame be stored at *sp. Thus each allocation of stack
11709 # space is itself an implicit probe of *sp.
11710 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
11714 # s390's ABI has a register save area allocated by the
11715 # caller for use by the callee. The mere existence does
11716 # not constitute a probe by the caller, but when the slots
11717 # used by the callee those stores are implicit probes.
11718 if { [istarget s390*-*-*] } {
11722 # Not strictly true on aarch64, but we have agreed that we will
11723 # consider any function that pushes SP more than 3kbytes into
11724 # the guard page as broken. This essentially means that we can
11725 # consider the aarch64 as having a caller implicit probe at
11727 if { [istarget aarch64*-*-*] } {
11731 if { [istarget loongarch64*-*-*] } {
11738 # Targets that potentially realign the stack pointer often cause residual
11739 # stack allocations and make it difficult to elimination loops or residual
11740 # allocations for dynamic stack allocations
11741 proc check_effective_target_callee_realigns_stack { } {
11742 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
11748 # Return 1 if CET instructions can be compiled.
11749 proc check_effective_target_cet { } {
11750 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
11753 return [check_no_compiler_messages cet object {
11758 } "-O2 -fcf-protection" ]
11761 # Return 1 if target supports floating point "infinite"
11762 proc check_effective_target_inf { } {
11763 return [check_no_compiler_messages supports_inf assembly {
11764 const double pinf = __builtin_inf ();
11768 # Return 1 if target supports floating point "infinite" for float.
11769 proc check_effective_target_inff { } {
11770 return [check_no_compiler_messages supports_inff assembly {
11771 const float pinf = __builtin_inff ();
11775 # Return 1 if the target supports ARMv8.3 Adv.SIMD Complex instructions
11776 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
11777 # Record the command line options needed.
11779 proc check_effective_target_arm_v8_3a_complex_neon_ok_nocache { } {
11780 global et_arm_v8_3a_complex_neon_flags
11781 set et_arm_v8_3a_complex_neon_flags ""
11783 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
11787 # Iterate through sets of options to find the compiler flags that
11788 # need to be added to the -march option.
11789 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
11790 if { [check_no_compiler_messages_nocache \
11791 arm_v8_3a_complex_neon_ok assembly {
11792 #if !defined (__ARM_FEATURE_COMPLEX)
11793 #error "__ARM_FEATURE_COMPLEX not defined"
11795 } "$flags -march=armv8.3-a"] } {
11796 set et_arm_v8_3a_complex_neon_flags "$flags -march=armv8.3-a"
11804 proc check_effective_target_arm_v8_3a_complex_neon_ok { } {
11805 return [check_cached_effective_target arm_v8_3a_complex_neon_ok \
11806 check_effective_target_arm_v8_3a_complex_neon_ok_nocache]
11809 proc add_options_for_arm_v8_3a_complex_neon { flags } {
11810 if { ! [check_effective_target_arm_v8_3a_complex_neon_ok] } {
11813 global et_arm_v8_3a_complex_neon_flags
11814 return "$flags $et_arm_v8_3a_complex_neon_flags"
11817 # Return 1 if the target supports ARMv8.3 Adv.SIMD + FP16 Complex instructions
11818 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
11819 # Record the command line options needed.
11821 proc check_effective_target_arm_v8_3a_fp16_complex_neon_ok_nocache { } {
11822 global et_arm_v8_3a_fp16_complex_neon_flags
11823 set et_arm_v8_3a_fp16_complex_neon_flags ""
11825 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
11829 # Iterate through sets of options to find the compiler flags that
11830 # need to be added to the -march option.
11831 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
11832 if { [check_no_compiler_messages_nocache \
11833 arm_v8_3a_fp16_complex_neon_ok assembly {
11834 #if !defined (__ARM_FEATURE_COMPLEX)
11835 #error "__ARM_FEATURE_COMPLEX not defined"
11837 } "$flags -march=armv8.3-a+fp16"] } {
11838 set et_arm_v8_3a_fp16_complex_neon_flags \
11839 "$flags -march=armv8.3-a+fp16"
11847 proc check_effective_target_arm_v8_3a_fp16_complex_neon_ok { } {
11848 return [check_cached_effective_target arm_v8_3a_fp16_complex_neon_ok \
11849 check_effective_target_arm_v8_3a_fp16_complex_neon_ok_nocache]
11852 proc add_options_for_arm_v8_3a_fp16_complex_neon { flags } {
11853 if { ! [check_effective_target_arm_v8_3a_fp16_complex_neon_ok] } {
11856 global et_arm_v8_3a_fp16_complex_neon_flags
11857 return "$flags $et_arm_v8_3a_fp16_complex_neon_flags"
11861 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.3
11862 # with the complex instruction extension, 0 otherwise. The test is valid for
11863 # ARM and for AArch64.
11865 proc check_effective_target_arm_v8_3a_complex_neon_hw { } {
11866 if { ![check_effective_target_arm_v8_3a_complex_neon_ok] } {
11869 return [check_runtime arm_v8_3a_complex_neon_hw_available {
11870 #include "arm_neon.h"
11875 float32x2_t results = {-4.0,5.0};
11876 float32x2_t a = {1.0,3.0};
11877 float32x2_t b = {2.0,5.0};
11879 #ifdef __ARM_ARCH_ISA_A64
11880 asm ("fcadd %0.2s, %1.2s, %2.2s, #90"
11883 : /* No clobbers. */);
11886 asm ("vcadd.f32 %P0, %P1, %P2, #90"
11889 : /* No clobbers. */);
11892 return (results[0] == 8 && results[1] == 24) ? 0 : 1;
11894 } [add_options_for_arm_v8_3a_complex_neon ""]]
11897 # Return 1 if the assembler supports assembling the Armv8.3 pointer authentication B key directive
11898 proc check_effective_target_arm_v8_3a_bkey_directive { } {
11899 return [check_no_compiler_messages cet object {
11901 asm (".cfi_b_key_frame");
11907 # Return 1 if the target supports executing the Armv8.1-M Mainline Low
11908 # Overhead Loop, 0 otherwise. The test is valid for ARM.
11910 proc check_effective_target_arm_v8_1_lob_ok { } {
11911 if { ![check_effective_target_arm_cortex_m] } {
11914 return [check_runtime arm_v8_1_lob_hw_available {
11918 asm ("movw r3, #10\n\t" /* movs? */
11919 "dls lr, r3" : : : "r3", "lr");
11922 asm goto ("le lr, %l0" : : : "lr" : loop);
11925 } "-march=armv8.1-m.main -mthumb" ]
11929 # Return 1 if this is an ARM target where Thumb-2 is used without
11930 # options added by the test and the target does not support executing
11931 # the Armv8.1-M Mainline Low Overhead Loop, 0 otherwise. The test is
11934 proc check_effective_target_arm_thumb2_no_arm_v8_1_lob { } {
11935 if { [check_effective_target_arm_thumb2]
11936 && ![check_effective_target_arm_v8_1_lob_ok] } {
11942 # Return 1 if this is an ARM target where -mthumb causes Thumb-2 to be
11943 # used and the target does not support executing the Armv8.1-M
11944 # Mainline Low Overhead Loop, 0 otherwise. The test is valid for ARM.
11946 proc check_effective_target_arm_thumb2_ok_no_arm_v8_1_lob { } {
11947 if { [check_effective_target_arm_thumb2_ok]
11948 && ![check_effective_target_arm_v8_1_lob_ok] } {
11954 # Returns 1 if the target is using glibc, 0 otherwise.
11956 proc check_effective_target_glibc { } {
11957 return [check_no_compiler_messages glibc_object assembly {
11958 #include <stdlib.h>
11959 #if !defined(__GLIBC__)
11965 # Return 1 if the target plus current options supports a vector
11966 # complex addition with rotate of half and single float modes, 0 otherwise.
11968 # This won't change for different subtargets so cache the result.
11970 foreach N {hf sf} {
11971 eval [string map [list N $N] {
11972 proc check_effective_target_vect_complex_rot_N { } {
11973 return [check_cached_effective_target_indexed vect_complex_rot_N {
11974 expr { [istarget aarch64*-*-*]
11975 || [istarget arm*-*-*] }}]
11980 # Return 1 if the target plus current options supports a vector
11981 # complex addition with rotate of double float modes, 0 otherwise.
11983 # This won't change for different subtargets so cache the result.
11986 eval [string map [list N $N] {
11987 proc check_effective_target_vect_complex_rot_N { } {
11988 return [check_cached_effective_target_indexed vect_complex_rot_N {
11989 expr { [istarget aarch64*-*-*] }}]
11994 # Return 1 if this target uses an LLVM assembler and/or linker
11995 proc check_effective_target_llvm_binutils { } {
11996 return [check_cached_effective_target llvm_binutils {
11997 expr { [istarget amdgcn*-*-*]
11998 || [check_effective_target_offload_gcn] }}]
12001 # Return 1 if the compiler supports '-mfentry'.
12003 proc check_effective_target_mfentry { } {
12004 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
12007 return [check_no_compiler_messages mfentry object {
12008 void foo (void) { }
12012 # Return 1 if this target supports indirect calls
12013 proc check_effective_target_indirect_calls { } {
12014 if { [istarget bpf-*-*] } {
12020 # Return 1 if we can use the -lgccjit option, 0 otherwise.
12022 proc check_effective_target_lgccjit { } {
12023 if { [info procs jit_target_compile] == "" } then {
12024 global GCC_UNDER_TEST
12025 if ![info exists GCC_UNDER_TEST] {
12026 set GCC_UNDER_TEST "[find_gcc]"
12028 proc jit_target_compile { source dest type options } [info body gcc_target_compile]
12030 return [check_no_compiler_messages lgccjit executable {
12031 int main() { return 0; }
12035 # Return 1 if the MSP430 small memory model is in use.
12036 proc check_effective_target_msp430_small {} {
12037 return [check_no_compiler_messages msp430_small assembly {
12038 #if (!defined __MSP430__ || defined __MSP430X_LARGE__)
12039 #error !msp430 || __MSP430X_LARGE__
12044 # Return 1 if the MSP430 large memory model is in use.
12045 proc check_effective_target_msp430_large {} {
12046 return [check_no_compiler_messages msp430_large assembly {
12047 #ifndef __MSP430X_LARGE__
12048 #error __MSP430X_LARGE__
12053 # Return 1 if GCC was configured with --with-tune=cortex-a76
12054 proc check_effective_target_tune_cortex_a76 { } {
12055 return [check_configured_with "with-tune=cortex-a76"]
12058 # Return 1 if the target has an efficient means to encode large initializers
12061 proc check_effective_target_large_initializer { } {
12062 if { [istarget nvptx*-*-*] } {
12069 # Return 1 if the target allows function prototype mismatches
12072 proc check_effective_target_non_strict_prototype { } {
12073 if { [istarget nvptx*-*-*] } {
12080 # Returns 1 if the target toolchain supports extended
12081 # syntax of .symver directive, 0 otherwise.
12083 proc check_symver_available { } {
12084 return [check_no_compiler_messages symver_available object {
12085 int foo(void) { return 0; }
12087 asm volatile (".symver foo,foo@VER_1, local");
12093 # Return 1 if emitted assembly contains .ident directive.
12095 proc check_effective_target_ident_directive {} {
12096 return [check_no_messages_and_pattern ident_directive \
12097 "(?n)^\[\t\]+\\.ident" assembly {
12102 # Return 1 if we're able to assemble movdiri and movdir64b
12104 proc check_effective_target_movdir { } {
12105 return [check_no_compiler_messages movdir object {
12107 foo (unsigned int *d, unsigned int s)
12109 __builtin_ia32_directstoreu_u32 (d, s);
12112 bar (void *d, const void *s)
12114 __builtin_ia32_movdir64b (d, s);
12116 } "-mmovdiri -mmovdir64b" ]
12119 # Return 1 if the target does not support address sanitizer, 0 otherwise
12121 proc check_effective_target_no_fsanitize_address {} {
12122 if ![check_no_compiler_messages fsanitize_address executable {
12123 int main (void) { return 0; }
12124 } "-fsanitize=address" ] {
12131 # Return 1 if this target supports 'R' flag in .section directive, 0
12132 # otherwise. Cache the result.
12134 proc check_effective_target_R_flag_in_section { } {
12136 global GCC_UNDER_TEST
12138 # Need auto-host.h to check linker support.
12139 if { ![file exists ../../auto-host.h ] } {
12143 return [check_cached_effective_target R_flag_in_section {
12148 set f [open $src "w"]
12149 puts $f "#include \"../../auto-host.h\""
12150 puts $f "#if HAVE_GAS_SHF_GNU_RETAIN == 0 || HAVE_INITFINI_ARRAY_SUPPORT == 0"
12151 puts $f "# error Assembler does not support 'R' flag in .section directive."
12155 verbose "check_effective_target_R_flag_in_section compiling testfile $src" 2
12156 set lines [${tool}_target_compile $src $obj assembly ""]
12161 if [string match "" $lines] then {
12162 verbose "check_effective_target_R_flag_in_section testfile compilation passed" 2
12165 verbose "check_effective_target_R_flag_in_section testfile compilation failed" 2
12171 # Return 1 if this target supports 'o' flag in .section directive, 0
12172 # otherwise. Cache the result.
12174 proc check_effective_target_o_flag_in_section { } {
12176 global GCC_UNDER_TEST
12178 # Need auto-host.h to check linker support.
12179 if { ![file exists ../../auto-host.h ] } {
12183 return [check_cached_effective_target o_flag_in_section {
12188 set f [open $src "w"]
12189 puts $f "#include \"../../auto-host.h\""
12190 puts $f "#if HAVE_GAS_SECTION_LINK_ORDER == 0"
12191 puts $f "# error Assembler does not support 'o' flag in .section directive."
12195 verbose "check_effective_target_o_flag_in_section compiling testfile $src" 2
12196 set lines [${tool}_target_compile $src $obj object ""]
12201 if [string match "" $lines] then {
12202 verbose "check_effective_target_o_flag_in_section testfile compilation passed" 2
12205 verbose "check_effective_target_o_flag_in_section testfile compilation failed" 2
12211 # return 1 if LRA is supported.
12213 proc check_effective_target_lra { } {
12214 if { [istarget hppa*-*-*] } {
12220 # Test whether optimizations are enabled ('__OPTIMIZE__') per the
12221 # 'current_compiler_flags' (thus don't cache).
12223 proc check_effective_target___OPTIMIZE__ {} {
12224 return [check_no_compiler_messages_nocache __OPTIMIZE__ assembly {
12225 #ifndef __OPTIMIZE__
12228 /* Avoid pedwarn about empty TU. */
12230 } [current_compiler_flags]]
12233 # Return 1 if python3 (>= 3.6) is available.
12235 proc check_effective_target_recent_python3 { } {
12236 set result [remote_exec host "python3 -c \"import sys; assert sys.version_info >= (3, 6)\""]
12237 set status [lindex $result 0]
12238 if { $status == 0 } then {
12245 # Return 1 if python3 contains a module
12247 proc check_effective_target_python3_module { module } {
12248 set result [remote_exec host "python3 -c \"import $module\""]
12249 set status [lindex $result 0]
12250 if { $status == 0 } then {
12257 # Return 1 if pytest module is available for python3.
12259 proc check_effective_target_pytest3 { } {
12260 set result [remote_exec host "python3 -m pytest --color=no -rap -s --tb=no --version"]
12261 set status [lindex $result 0]
12262 if { $status == 0 } then {
12269 proc check_effective_target_property_1_needed { } {
12270 return [check_no_compiler_messages property_1_needed executable {
12271 /* Assembly code */
12273 # define __PROPERTY_ALIGN 3
12275 # define __PROPERTY_ALIGN 2
12278 .section ".note.gnu.property", "a"
12279 .p2align __PROPERTY_ALIGN
12280 .long 1f - 0f /* name length. */
12281 .long 4f - 1f /* data length. */
12282 /* NT_GNU_PROPERTY_TYPE_0. */
12283 .long 5 /* note type. */
12285 .asciz "GNU" /* vendor name. */
12287 .p2align __PROPERTY_ALIGN
12288 /* GNU_PROPERTY_1_NEEDED. */
12289 .long 0xb0008000 /* pr_type. */
12290 .long 3f - 2f /* pr_datasz. */
12292 /* GNU_PROPERTY_1_NEEDED_INDIRECT_EXTERN_ACCESS. */
12295 .p2align __PROPERTY_ALIGN
12304 # Return 1 if this target has prog named "$prog", 0 otherwise.
12306 proc check_is_prog_name_available { prog } {
12309 set options [list "additional_flags=-print-prog-name=$prog"]
12310 set output [lindex [${tool}_target_compile "" "" "none" $options] 0]
12312 if { $output == $prog } {