Created attachment 31840 [details] case to reproduce the ICE When use upstream 4.8 gcc to compile attached case with command: "arm-none-eabi-gcc -mthumb -fprefetch-loop-arrays crash.c -O2 -S -mcpu=cortex-m4", we will get ICE: crash.c: In function 'genxScrubText': crash.c:32:1: internal compiler error: in reg_overlap_mentioned_p, at rtlanal.c:1469 } ^ The option -fprefetch-loop-arrays causes gcc to generate rtx for ARM PLD instruction like: (insn 99 100 105 10 (prefetch (plus:SI (reg/v/f:SI 3 r3 [orig:143 last ] [143]) (const_int 34 [0x22])) (const_int 0 [0]) (const_int 3 [0x3])) 343 {prefetch} (nil)) When check data dependencies between this rtx and others, gcc mishandles it as a normal SET rtx and thus end up with ICE. Trunk gcc hasn't such issue due to code improvement at http://gcc.gnu.org/ml/gcc-patches/2013-11/msg00533.html.
As discussed in http://gcc.gnu.org/ml/gcc-patches/2014-01/msg00875.html, the root cause should be incorrect insn type of preload instruction. 4.8 assigns alu type attribute to preload insn which causes other optimization passes think it can cause data dependence between alu->load/store. The trunk gcc with patch http://gcc.gnu.org/ml/gcc-patches/2013-09/msg00322.html, correctly assign load1 insn type to preload instruction, which avoids the check of data dependence between alu->load/store, thereby no such issue. So the best way to fix this issue in 4.8 is to back port the patch to assign the proper insn type attribute.
Forgot to mention PR number in my commit. This issue is fixed by http://gcc.gnu.org/ml/gcc-cvs/2014-01/msg00436.html.