Created attachment 25208 [details] reduced testcase There are three testcases that ICE with a very similiar message: $ gcc -O -mavx -ftree-vectorize gcc.target/i386/avx-vcmppd-256-1.c gcc.target/i386/avx-vcmppd-256-1.c: In function 'do_test': gcc.target/i386/avx-vcmppd-256-1.c:49:5: internal compiler error: in gen_vcondv4div4df, at config/i386/sse.md:1418 Please submit a full bug report, with preprocessed source if appropriate. See <http://gcc.gnu.org/bugs.html> for instructions. $ gcc -O -mavx -ftree-vectorize gcc.target/i386/avx-vcmpps-1.c gcc.target/i386/avx-vcmpps-1.c: In function 'do_test': gcc.target/i386/avx-vcmpps-1.c:49:5: internal compiler error: in gen_vcondv4siv4sf, at config/i386/sse.md:1435 Please submit a full bug report, with preprocessed source if appropriate. See <http://gcc.gnu.org/bugs.html> for instructions. $ gcc -O -mavx -ftree-vectorize gcc.target/i386/avx-vcmpps-256-1.c gcc.target/i386/avx-vcmpps-256-1.c: In function 'do_test': gcc.target/i386/avx-vcmpps-256-1.c:49:5: internal compiler error: in gen_vcondv8siv8sf, at config/i386/sse.md:1418 Please submit a full bug report, with preprocessed source if appropriate. See <http://gcc.gnu.org/bugs.html> for instructions. As the ICEs look quite similiar, I am opening just one PR for it. Compiler output: $ gcc -O -ftree-vectorize testcase.c testcase.c: In function 'foo': testcase.c:9:10: internal compiler error: in gen_vcondv2div2df, at config/i386/sse.md:1435 Please submit a full bug report, with preprocessed source if appropriate. See <http://gcc.gnu.org/bugs.html> for instructions. Maybe related to the "Vector Comparison patch".
While this exact testcase is a recent regression, caused by http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178480 double s1[4], s2[4], s3[4]; void foo (void) { int i; for (i = 0; i < 4; i++) s3[i] = !__builtin_isunordered (s1[i], s2[i]) && s1[i] != s2[i] ? -1.0 : 0.0; } ICEd for some time already (e.g. with -O3 -mavx or on powerpc64 with -O3 -mvsx). The problem is that vcond isn't supported for all possible conditions (LTGT in this case) on all targets, the sse.md pattern just ICEs if the expanding routine fails, on powerpc64 it ICEs in the middle end because it FAILed. So, to fix this either vcond conditions would need to test for the unsupported condition codes and the vectorizer would need to use the condition, or all targets that provide vcond* patterns would need to support all possible condition codes.
On this second testcase it started with http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=171236
For a very similiar testcase: double s1[4]; double s2[4]; long long e[4]; void foo(void) { int i; for (i = 0; i < 4; i++) e[i] = __builtin_isunordered(s1[i], s2[i]) && s1[i] != s2[i] ? -1 : 0; } Compilation fails with: $ gcc -O -mavx -ftree-vectorize testcase2.c /tmp/cc7w0heQ.s: Assembler messages: /tmp/cc7w0heQ.s:17: Error: operand type mismatch for `vpand' or $ gcc -O -mavx -ftree-vectorize testcase2.c -masm=intel /tmp/ccyNaxE9.s: Assembler messages: /tmp/ccyNaxE9.s:18: Error: operand size mismatch for `vpand' (-mavx is needed) I don't know if that's related, GCC 4.6 generates very different code. My as might be outdated as well.
Created attachment 25212 [details] gcc47-pr50310-c3.patch The latter failure is an unrelated bug in the AVX2 support, untested fix for that attached, will add a testcase, ChangeLog, test it and submit.
Created attachment 25213 [details] gcc47-pr50310-c3.patch Updated patch.
Created attachment 25214 [details] gcc47-pr50310-c3.patch Actually, using OImode for all modes for TARGET_AVX2 is wrong too, so this patch fixes that too.
(In reply to comment #2) > On this second testcase it started with > http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=171236 Still a latent issue - the above hid it probably as well, while with -fno-trapping-math it should have been exposed even without that patch.
(In reply to comment #1) > While this exact testcase is a recent regression, caused by > http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178480 > > double s1[4], s2[4], s3[4]; > > void > foo (void) > { > int i; > for (i = 0; i < 4; i++) > s3[i] = !__builtin_isunordered (s1[i], s2[i]) && s1[i] != s2[i] ? -1.0 : > 0.0; > } > > ICEd for some time already (e.g. with -O3 -mavx or on powerpc64 with -O3 > -mvsx). > The problem is that vcond isn't supported for all possible conditions (LTGT in > this case) on all targets, the sse.md pattern just ICEs if the expanding > routine fails, on powerpc64 it ICEs in the middle end because it FAILed. So, > to fix this either vcond conditions would need to test for the unsupported > condition codes and the vectorizer would need to use the condition, or all > targets that provide vcond* patterns would need to support all possible > condition codes. We could for now strip the number of supported comparison codes down and remove the irregular ones, giving expand_vec_cond_expr_p a comparison code argument. Or split the vcond<mode><mode> pattern into different ones for each comparison code (ugh).
You are right, with -O3 -fno-trapping-math already r151206 ICEs (haven't bisected it down though). If the vcond* condition on all targets just returned 0 for codes it doesn't support, the vectorizer would need to create dummy RTL arguments in expand_vec_cond_expr_p. But perhaps that's still better than adding yet another iterator to vcond, then it would iterate on 3 iterators...
Created attachment 25219 [details] gcc47-pr50310-avx.patch For -mavx apparently we have CPU support for LTGT and UNEQ (and loads of other possibilities). For -mno-avx we need to do something in ix86_expand_fp_vcond I guess.
Created attachment 25222 [details] gcc47-pr50310.patch And this patch handles also pre-AVX SSE*.
Author: jakub Date: Wed Sep 7 19:46:14 2011 New Revision: 178659 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178659 Log: * config/i386/sse.md (sseinsnmode): Remove 32-byte integer vector duplicates. PR target/50310 * config/i386/sse.md (*andnot<mode>3, *<code><mode>3): Fix up "mode" attribute computation. * gcc.dg/pr50310-1.c: New test. Added: trunk/gcc/testsuite/gcc.dg/pr50310-1.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/i386/sse.md trunk/gcc/testsuite/ChangeLog
Author: jakub Date: Thu Sep 8 05:58:54 2011 New Revision: 178673 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178673 Log: PR target/50310 * config/i386/i386.c (ix86_prepare_sse_fp_compare_args): Return code early if TARGET_AVX. (ix86_expand_fp_vcond): Handle LTGT and UNEQ. * gcc.c-torture/execute/ieee/pr50310.c: New test. * gcc.dg/pr50310-2.c: New test. Added: trunk/gcc/testsuite/gcc.c-torture/execute/ieee/pr50310.c trunk/gcc/testsuite/gcc.dg/pr50310-2.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/i386/i386.c trunk/gcc/testsuite/ChangeLog
Author: jakub Date: Thu Sep 8 06:01:40 2011 New Revision: 178674 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178674 Log: PR target/50310 * config/i386/i386.c (ix86_prepare_sse_fp_compare_args): Return code early if TARGET_AVX. (ix86_expand_fp_vcond): Handle LTGT and UNEQ. * gcc.c-torture/execute/ieee/pr50310.c: New test. * gcc.dg/pr50310-2.c: New test. Added: branches/gcc-4_6-branch/gcc/testsuite/gcc.c-torture/execute/ieee/pr50310.c branches/gcc-4_6-branch/gcc/testsuite/gcc.dg/pr50310-2.c Modified: branches/gcc-4_6-branch/gcc/ChangeLog branches/gcc-4_6-branch/gcc/config/i386/i386.c branches/gcc-4_6-branch/gcc/testsuite/ChangeLog
Fixed.
Author: uweigand Date: Wed Oct 19 12:17:35 2011 New Revision: 180184 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=180184 Log: PR target/50310 * config/spu/spu.c (spu_emit_vector_compare): Support unordered floating-point comparisons. Modified: trunk/gcc/ChangeLog trunk/gcc/config/spu/spu.c
Author: meissner Date: Tue Mar 6 17:15:43 2012 New Revision: 185007 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=185007 Log: 2012-03-05 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/50310 * config/rs6000/vector.md (vector_uneq<mode>): Add support for UNEQ, LTGT, ORDERED, and UNORDERED IEEE vector comparisons. (vector_ltgt<mode>): Likewise. (vector_ordered<mode>): Likewise. (vector_unordered<mode>): Likewise. * config/rs6000/rs6000.c (rs6000_emit_vector_compare_inner): Likewise. Modified: trunk/gcc/ChangeLog trunk/gcc/config/rs6000/rs6000.c trunk/gcc/config/rs6000/vector.md
Author: meissner Date: Tue Mar 6 19:46:28 2012 New Revision: 185014 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=185014 Log: 2012-03-06 Michael Meissner <meissner@linux.vnet.ibm.com> Backport from mainline PR target/50310 * config/rs6000/vector.md (vector_uneq<mode>): Add support for UNEQ, LTGT, ORDERED, and UNORDERED IEEE vector comparisons. (vector_ltgt<mode>): Likewise. (vector_ordered<mode>): Likewise. (vector_unordered<mode>): Likewise. * config/rs6000/rs6000.c (rs6000_emit_vector_compare_inner): Likewise. Modified: branches/gcc-4_6-branch/gcc/ChangeLog branches/gcc-4_6-branch/gcc/config/rs6000/rs6000.c branches/gcc-4_6-branch/gcc/config/rs6000/vector.md
Author: meissner Date: Tue Mar 6 20:48:52 2012 New Revision: 185016 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=185016 Log: 2012-03-05 Michael Meissner <meissner@linux.vnet.ibm.com> Backport from mainline 2012-03-06 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/50310 * config/rs6000/vector.md (vector_uneq<mode>): Add support for UNEQ, LTGT, ORDERED, and UNORDERED IEEE vector comparisons. (vector_ltgt<mode>): Likewise. (vector_ordered<mode>): Likewise. (vector_unordered<mode>): Likewise. * config/rs6000/rs6000.c (rs6000_emit_vector_compare_inner): Likewise. Modified: branches/gcc-4_5-branch/gcc/ChangeLog branches/gcc-4_5-branch/gcc/config/rs6000/rs6000.c branches/gcc-4_5-branch/gcc/config/rs6000/vector.md
Author: meissner Date: Tue Mar 6 20:56:09 2012 New Revision: 185017 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=185017 Log: Merge up to 185014 to get fix for pr 50310. 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Author: meissner Date: Tue Mar 6 21:50:45 2012 New Revision: 185018 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=185018 Log: Merge up to 185016, pick up fix for pr 50310. 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Author: meissner Date: Fri Mar 23 16:16:38 2012 New Revision: 185743 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=185743 Log: 2012-03-23 Michael Meissner <meissner@linux.vnet.ibm.com> Backported from mainline 2012-03-06 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/50310 * config/rs6000/vector.md (vector_uneq<mode>): Add support for UNEQ, LTGT, ORDERED, and UNORDERED IEEE vector comparisons. (vector_ltgt<mode>): Likewise. (vector_ordered<mode>): Likewise. (vector_unordered<mode>): Likewise. * config/rs6000/rs6000.c (rs6000_emit_vector_compare_inner): Likewise. Modified: branches/gcc-4_7-branch/gcc/ChangeLog branches/gcc-4_7-branch/gcc/config/rs6000/rs6000.c branches/gcc-4_7-branch/gcc/config/rs6000/vector.md