Assembler instructions with C expression operands, gcc(arm-elf-gcc) compiler may produce the wrong instrctions sequence with option -O2.There is a case only for test below.

In the case, the second instruction ("mov r0, r1") destroyed r0 without saving, but r0 kept the value of variable fd and the variable should be passed to "swi   0". I think it's a serious bug, gcc compiler does not consider that "unsigned  high = length / 23" may produce a function call.
================================case  start ================================
static __inline__ int __syscall_test(int fd, unsigned pad, unsigned long high, unsigned low)
{
     unsigned int __sys_result;
    {
        register int _a1 __asm__ ("r0") = fd;
        register int _a2 __asm__ ("r1") = pad;
        register int _a3 __asm__ ("r2") = high;
        register int _a4 __asm__ ("r3") = low;

        __asm__ __volatile__ ("swi  0"
                : "=r"(_a1)
                : "0"(_a1),"r"(_a3), "r"(_a4));
        __sys_result = _a1;
    }
    return __sys_result;
}




int f_test(int fd, long long length)
{
    unsigned low = length & 0xffffffff;

    unsigned  high = length / 23;

    return __syscall_test(fd, 0, high, low);
}

---------------------- compile result --------------
    .file   "case.c"
    .global __divdi3
    .text
    .align  2
    .global f_test
    .type   f_test, %function
f_test:
    @ args = 0, pretend = 0, frame = 0
    @ frame_needed = 0, uses_anonymous_args = 0
    stmfd   sp!, {r4, lr}
    mov r0, r1
    mov r4, r1
    mov r3, #0
    mov r1, r2
    mov r2, #23
    bl  __divdi3
    mov r3, r4
    mov r2, r0
@ 10 "case.c" 1
    swi 0
@ 0 "" 2
    ldmfd   sp!, {r4, pc}
    .size   f_test, .-f_test
    .ident  "GCC: (GNU) 4.5.2"
==================== end ===============================