Created attachment 23866 [details] Source, intermediate and object code demonstrating the problem On ARM (at least for ARM966, which is the platform for which this GCC was compiled), fast interrupt queue, or FIQ, has a private copy of registers r8 through r14, and those do not need to be saved if used by the interrupt service routine. When creating an interrupt handler, GCC is obviously aware of this fact, as it does not save the frame pointer at the beginning of the function (which it does if a different type of interrupt is requested). It still, however, begin allocation of registers from r2 and r3, and that forces it to save them at the beginning of the function. Beginning the allocation at r8 and r9 would have saved all register saving, and made the function more efficient. Problem happens even when compiled with -O3. Function in attachment could have easily been implemented without the need for either save or restore of any registers at all. Shachar
Confirmed.
Even 8 years later, this bug is not fixed (gcc 8.3). I believe clang/llvm has the same problem. Anyhow, that's not the only problem. The moment that a function is called, registers r0 to r3 (and maybe others) have to be saved. Then again, you probably don't call a function in your FIQ since you want it to be fast. With the help of gcc's generated assembly, I write my FIQ handler in assembler. I don't mind, but fixing this would be very convenient.
This is a missed optimization, not a bug. Given that we have many more pressing issues it is unlikely to be addressed soon. Of course, patches are always welcome...