Created attachment 23808 [details] Complete output of compilation When using the flags "-g -O2", the right assembler code is emitted. When dropping the -O2, and using only "-g", the wrong assembler code is emitted.
Created attachment 23809 [details] preporcessor output
I installed and built the source RPM mediatomb-0.12.1-5.fc14.src.rpm, using the default compile flags, -g -O2, and this is fine, except that debugging was difficult, so I rebuilt using only -g. This is when the assembler complained: Quote: ../src/zmm/atomic.h: Assembler messages: ../src/zmm/atomic.h:81: Error: bad register name `%sil' Line 81 in atomic.h is the inline asm statement: Code: static inline bool atomic_dec(mt_atomic_t *at) { unsigned char c; __asm__ __volatile__( ASM_LOCK "decl %0; sete %1" :"=m" (at->x), "=g" (c) :"m" (at->x) :"cc" ); return (c!=0); } I edited the compile command, replacing, -c with -S, and .o with .asm, to take a look at the generated assembler code. Here is the relevant snippet: Code: # 81 "../src/zmm/atomic.h" 1 lock; decl (%eax); sete %sil Sure enough, the gcc inline module inserted a reference to the "%sil" register, which is not part of the x86 32-bit architecture. The only difference on the command line was the absence of the "-O2" flag. I did some more experimenting, and found that "-O1" produces proper code. Then I did a compile replacing "-O1" with all the implied optimization flags, but the .asm file had the improper reference to "%sil" ! The gcc documentation does explain that "-On" is not exactly equivalent to using the implied flags, and I guess that my experience, here, corroborates this.
I'm sure that sete doesn't work with any general operand. Use proper constraints.
(In reply to comment #3) > I'm sure that sete doesn't work with any general operand. Use proper > constraints. You are right. sete must operate on an 8-bit register or an 8-bit memory location. GCC knows that the reference is to an 8-bit unsigned char, and GCC does the right thing under the "-g -O2" flags, so why not under the "-g" flag? I was not able to find a way to change the "=g" constraint to force GCC to use an 8-bit register/memory location.
Use "=q" isntead of "=g". *** This bug has been marked as a duplicate of bug 10153 ***