Bug 48169 - compiler is confused about scope
Summary: compiler is confused about scope
Status: RESOLVED INVALID
Alias: None
Product: gcc
Classification: Unclassified
Component: c++ (show other bugs)
Version: 4.5.0
: P3 normal
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2011-03-17 15:44 UTC by Peter Foelsche
Modified: 2011-03-17 16:19 UTC (History)
1 user (show)

See Also:
Host:
Target:
Build:
Known to work:
Known to fail:
Last reconfirmed:

Attachments
gzipped .ii file (214.71 KB, application/x-gzip)
2011-03-17 15:44 UTC, Peter Foelsche 		Details
command to call the compiler (896 bytes, application/octet-stream)
2011-03-17 15:45 UTC, Peter Foelsche 		Details
gzipped compiler log (15.92 KB, application/x-gzip)
2011-03-17 15:46 UTC, Peter Foelsche 		Details
output of "uname -a" (96 bytes, text/plain)
2011-03-17 15:47 UTC, Peter Foelsche 		Details
View All Add an attachment (proposed patch, testcase, etc.)

Note You need to log in before you can comment on or make changes to this bug.
Description Peter Foelsche 2011-03-17 15:44:24 UTC 
Created attachment 23695 [details]
gzipped .ii file

The compiler seems to get totally confused about scope.
Here comes the error message:

In file included from VerilogA/src/vsLexer/../../include/vsParser/vsYYparse.H:22:0,
                 from vsVeriSmartLex.cxx:1652:
VerilogA/src/vsLexer/../../include/vsParser/../vsExpr/vsExpr.H: In member function ‘virtual CVectorOfVisited CTwoArgumentOperator<P, BCOMMUTATIVE, KIND, TYPE, CREATEFROMCHILDREN, BDERIVE, DERIVE, GETPOTENTIALREPRESENTATIONS, TYPE_FLAGS>::getPotentialRepresentations(const visited*, silvaco::verilogCompiler::CVerilogCompilerArgs*) const’:
VerilogA/src/vsLexer/../../include/vsParser/../vsExpr/vsExpr.H:1985:22: error: too few arguments to function ‘int clone(int (*)(void*), void*, int, void*)’
/usr/include/bits/sched.h:71:12: note: declared here
VerilogA/src/vsLexer/../../include/vsParser/../vsExpr/vsExpr.H:1987:25: error: ‘m_sChildren’ was not declared in this scope
VerilogA/src/vsLexer/../../include/vsParser/../vsExpr/vsExpr.H:1989:52: error: there are no arguments to ‘createFromChildren1’ that depend on a template parameter, so a declaration of ‘createFromChildren1’ must be available
VerilogA/src/vsLexer/../../include/vsParser/../vsExpr/vsExpr.H:1989:52: note: (if you use ‘-fpermissive’, G++ will accept your code, but allowing the use of an undeclared name is deprecated)

To make this compileable, 
simply add a 
this-> 
in front of every member object or method:

clone, m_sChildren, createFromChildren1
Comment 1 Peter Foelsche 2011-03-17 15:45:48 UTC 
Created attachment 23696 [details]
command to call the compiler
Comment 2 Peter Foelsche 2011-03-17 15:46:26 UTC 
Created attachment 23697 [details]
gzipped compiler log
Comment 3 Peter Foelsche 2011-03-17 15:47:09 UTC 
Created attachment 23698 [details]
output of "uname -a"
Comment 4 Jonathan Wakely 2011-03-17 16:02:00 UTC 
In a template unqualified names are not looked up in dependent base classes

Even if it was a bug, it would not be 'critical' severity, gcc does not crash, no data is lost.. That field is not meant for you to say "I think this is really really important"
Comment 6 Peter Foelsche 2011-03-17 16:14:27 UTC 
> In a template unqualified names are not looked up in dependent base classes

Aegypt?!

Then explain to me, why it works for all the other classes and including other methods inside this class.
Comment 7 Peter Foelsche 2011-03-17 16:18:13 UTC 
(In reply to comment #6)
> > In a template unqualified names are not looked up in dependent base classes
> 
> Aegypt?!
> 
> Then explain to me, why it works for all the other classes and including other
> methods inside this class.

never mind -- I understand -- sorry about the noise
Comment 8 Jonathan Wakely 2011-03-17 16:19:07 UTC 
See the link in comment 5, or this one:
http://clang.llvm.org/compatibility.html#dep_lookup_bases
or this one:
http://www.parashift.com/c++-faq/templates.html#faq-35.19