For following testcase:
int e,f;
float
main(float d,float c)
{
   float a;
   float e;
   if (e)
     a=d, e=c;
   else
     a=c, c=e;
   if (f)
     e=a;
   return e;
}
(it looks artifical, but all the moves are there just to make "a" to be only source or destination of reg-reg move that is not that uncommon in real world code)
we generate completely bogus:
main:
.LFB0:
        .cfi_startproc
        xorps   %xmm2, %xmm2
        movss   %xmm1, -4(%rsp)
        movl    -4(%rsp), %eax
        ucomiss %xmm2, %xmm2
        jp      .L7
        je      .L3
.L7:
        movss   %xmm0, -4(%rsp)
        movl    -4(%rsp), %eax
        movaps  %xmm1, %xmm2
.L3:
        movl    f(%rip), %edx
        testl   %edx, %edx
        je      .L4
        movl    %eax, -4(%rsp)
        movss   -4(%rsp), %xmm2
.L4:
        movaps  %xmm2, %xmm0
        ret

instead of
main:
.LFB2:
        movaps  %xmm0, %xmm3
        xorps   %xmm0, %xmm0
        movaps  %xmm1, %xmm2
        ucomiss %xmm0, %xmm0
        jp      .L2
        je      .L3
.L2:
        movaps  %xmm3, %xmm2
        movaps  %xmm1, %xmm0
.L3:
        movl    f(%rip), %eax
        testl   %eax, %eax
        je      .L4
        movaps  %xmm2, %xmm0
.L4:
        rep
        ret
.LFE2:

generated by GCC 4.3.2.

The problem is that IRA concludes wrong register preferencing:
    a3 (r62,l0) best SSE_REGS, cover SSE_REGS
    a2 (r61,l0) best SSE_FIRST_REG, cover SSE_REGS
    a1 (r59,l0) best GENERAL_REGS, cover GENERAL_REGS
    a0 (r58,l0) best SSE_FIRST_REG, cover SSE_REGS

this is because of movdf pattern having alternative for general regs.
This alternative is however useful primarily when the value is temporary for mem-mem moves, and IRA should be able to work this out.